
TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145K 
 JULY 2000 
 REVISED AUGUST 2005
108
POST OFFICE BOX 1443 
 HOUSTON, TEXAS 77251
1443
10-bit analog-to-digital converter (ADC) (continued)
operating characteristics over recommended operating condition ranges
 
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
V
CCA
 = 3.3 V
10
15
mA
I
CCA
Analog supply current
V
CCA
 =  V
REFHI 
= 3.3 V
PLL or OSC power
down
1
μ
A
I
ADREFHI
V
REFHI
 input current
0.75
1.5
mA
I
ADCIN
Analog input leakage
1
μ
A
C
ai
Analog input capacitance
Typical capacitive load on
analog input pin
Non-sampling
10
pF
Sampling
30
t
d(PU)
Delay time, power-up to ADC valid
Time to stabilize analog stage after power-up
10
μ
s
Z
AI
Analog input source impedance
Analog input source impedance needed for
conversions to remain within specifications at min
t
w(SH)
53
10
Zero-offset error
2
LSB
Absolute  resolution = 3.22 mV. At V
REFHI
 = 3.3 V and V
REFLO
 = 0 V, this is one LSB. As V
REFHI
 decreases, V
REFLO
 increases, or both, the LSB
size decreases. Therefore, the absolute accuracy and differential/integral linearity errors in terms of LSBs increase.
E
DNL
 and E
INL
PARAMETER
DESCRIPTION
CLKOUT
MIN
MAX
UNIT
E
DNL
Differential nonlinearity error
Difference between the actual step width
and the ideal value
30 MHz
2
LSB
E
INL
Integral nonlinearity error
Maximum deviation from the best straight
line through the ADC transfer
characteristics, excluding the quantization
error
30 MHz
2
LSB
Test conditions: V
REFHI
 = V
CCA
, V
REFLO
 = V
SSA