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參數(shù)資料
| 型號(hào)： | TMX320C6211PYP167 |
| 廠(chǎng)商： | Texas Instruments, Inc. |
| 元件分類(lèi)： | 數(shù)字信號(hào)處理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 22/83頁(yè) |
| 文件大?。?/td> | 1176K |
| 代理商： | TMX320C6211PYP167 |
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TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
22
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
Terminal Functions (Continued)
SIGNAL
NAME
TYPE
IPD/
IPU
DESCRIPTION
NO.
EMIF
BUS ARBITRATION
Hold-request-acknowledge to the host
Hold request from the host
Bus request output
HOLDA
HOLD
BUSREQ
J18
J17
J19
O
I
O
IPU
IPU
IPU
EMIF
ASYNCHRONOUS/SYNCHRONOUS DRAM/SYNCHRONOUS BURST SRAM MEMORY CONTROL
Y11
I
IPD
EMIF input clock
Y10
O
IPD
EMIF output clock (based on ECLKIN)
ECLKIN
ECLKOUT
ARE/SDCAS/
SSADS
V11
O/Z
IPU
Asynchronous memory read enable/SDRAM column-address strobe/SBSRAM address strobe
AOE/SDRAS/
SSOE
W10
O/Z
IPU
Asynchronous memory output enable/SDRAM row-address strobe/SBSRAM output enable
AWE/SDWE/
SSWE
V12
O/Z
IPU
Asynchronous memory write enable/SDRAM write enable/SBSRAM write enable
ARDY
Y5
I
IPU
Asynchronous memory ready input
EMIF
ADDRESS
EA21
EA20
EA19
EA18
EA17
EA16
EA15
EA14
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k
IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
U18
Y18
W17
Y16
V16
Y15
W15
Y14
W14
V14
W13
V10
Y9
V9
Y8
W8
V8
W7
V7
Y6
O/Z
IPU
EMIF external address
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