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參數(shù)資料
| 型號： | TMX320C6201GJC167 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 定點(diǎn)數(shù)字信號處理器 |
| 文件頁數(shù)： | 4/83頁 |
| 文件大?。?/td> | 1176K |
| 代理商： | TMX320C6201GJC167 |
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TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
4
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
device characteristics
Table 1 provides an overview of the C6211/C6211B DSP. The table shows significant features of each device,
including the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count.
For more details on the C6000
DSP device part numbers and part numbering, see Table 17 and Figure 4.
Table 1. Characteristics of the C6211/C6211B Processors
HARDWARE FEATURES
C6211
(FIXED-POINT DSP)
C6211B
(FIXED-POINT DSP)
EMIF
(Clock source = ECLKIN)
1
1
EDMA
(Internal clock source =
CPU clock frequency)
1
1
Peripherals
HPI
McBSPs
(Internal clock source =
CPU/2 clock frequency)
1
1
2
2
32-Bit Timers
(Internal clock source =
CPU/4 clock frequency)
2
2
Size (Bytes)
72K
72K
On-Chip
Memory
Organization
4K-Byte (4KB) L1 Program (L1P) Cache
4KB L1 Data (L1D) Cache
64KB Unified Mapped RAM/Cache (L2)
4K-Byte (4KB) L1 Program (L1P) Cache
4KB L1 Data (L1D) Cache
64KB Unified Mapped RAM/Cache (L2)
CPU ID+
CPU Rev ID
Control Status Register
(CSR.[31:16])
0x0002
0x0002
Frequency
MHz
167, 150
167, 150
Cycle Time
ns
6 ns (C6211-167)
6.7 ns (C6211-150)
6 ns (C6211B-167)
6.7 ns (C6211B-150)
6.7 ns (C6211BGFNA-150)
Voltage
Core (V)
I/O (V)
CLKIN frequency multiplier
27 x 27 mm
1.8
3.3
1.8
3.3
PLL Options
BGA Package
Process
Technology
Bypass (x1), x4
256-Pin BGA (GFN)
Bypass (x1), x4
256-Pin BGA (GFN)
μ
m
0.18
μ
m
0.18
μ
m
Product Status
Product Preview (PP)
Advance Information (AI)
Production Data (PD)
PD
PD
C6000 is a trademark of Texas Instruments.
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