參數(shù)資料
型號: TMX320C2812ZHHQ
廠商: Texas Instruments, Inc.
英文描述: BULB REPLACEMENT 32W
中文描述: TMS320R2811,TMS320R2812數(shù)字信號處理器
文件頁數(shù): 133/147頁
文件大小: 2021K
代理商: TMX320C2812ZHHQ
Electrical Specifications
133
June 2004
SPRS257
6.29.7
Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1)
In simultaneous mode, the ADC can continuously convert input signals on any one pair of channels (A0/B0
to A7/B7). The ADC can start conversions on event triggers from the Event Managers (EVA/EVB), software
trigger, or from an external ADCSOC signal. If the SMODE bit is 1, the ADC will do conversions on two selected
channels on every Sample/Hold pulse. The conversion time and latency of the Result register update are
explained below. The ADC interrupt flags are set a few SYSCLKOUT cycles after the Result register update.
The selected channels will be sampled simultaneously at the falling edge of the Sample/Hold pulse. The
Sample/Hold pulse width can be programmed to be 1 ADC clock wide (minimum) or 16 ADC clocks wide
(maximum).
NOTE:
In Simultaneous mode, the ADCIN channel pair select has to be A0/B0, A1/B1, ...,
A7/B7, and
not
in other combinations (such as A1/B3, etc.).
Analog Input on
Channel Ax
Analog Input on
Channel Bv
ADC Clock
Sample and Hold
SH Pulse
t
SH
t
dschA0_n
t
dschB0_n
t
dschB0_n+1
Sample n
Sample n+1
Sample n+2
t
dschA0_n+1
t
d(SH)
ADC Event Trigger
from EV or Other
Sources
SMODE Bit
Figure 6
37. Simultaneous Sampling Mode Timing
Table 6
42. Simultaneous Sampling Mode Timing
SAMPLE n
SAMPLE n + 1
AT 25-MHz ADC
CLOCK,
t
c(ADCCLK)
= 40 ns
REMARKS
t
d(SH)
Delay time from event
trigger to sampling
2.5t
c(ADCCLK)
t
SH
Sample/Hold width/
Acquisition Width
(1 + Acqps) *
t
c(ADCCLK)
40 ns with Acqps = 0
Acqps value = 0-15
ADCTRL1[8:11]
t
d(schA0_n)
Delay time for first result
to appear in Result
register
4t
c(ADCCLK)
160 ns
t
d(schB0_n)
Delay time for first result
to appear in Result
register
5t
c(ADCCLK)
200 ns
t
d(schA0_n+1)
Delay time for
successive results to
appear in Result register
(3 + Acqps) *
t
c(ADCCLK)
120 ns
t
d(schB0_n+1)
Delay time for
successive results to
appear in Result register
(3 + Acqps) *
t
c(ADCCLK)
120 ns
A
相關PDF資料
PDF描述
TMX320F2811ZHHQ BULB REPLACEMENT 9W
TMX320R2811ZHHQ MICROSCOPE STEREO ZOOM W/LT RING
TMP320F2812ZHHQ MICROSCOPE LTD SHOP W/DL RETICLE
TMP320C2811ZHHQ TMS320R2811, TMS320R2812 Digital Signal Processors
TMR320F2811ZHHQ TMS320R2811, TMS320R2812 Digital Signal Processors
相關代理商/技術參數(shù)
參數(shù)描述
TMX320C2812ZHHS 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS320R2811, TMS320R2812 Digital Signal Processors
TMX320C28343ZHH 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
TMX320C28345ZEP 制造商:Texas Instruments 功能描述:DELFINO MICROCONTROLLER - Trays
TMX320C28345ZHH 制造商:Texas Instruments 功能描述:DELFINO MICROCONTROLLER - Trays
TMX320C28346ZEP 功能描述:32位微控制器 - MCU Delfino Micro controller RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT