參數(shù)資料
型號: TMX320C2812PGFS
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: TMS320R2811, TMS320R2812 Digital Signal Processors
中文描述: TMS320R2811,TMS320R2812數(shù)字信號處理器
文件頁數(shù): 71/147頁
文件大?。?/td> 2021K
代理商: TMX320C2812PGFS
Peripherals
71
June 2004
SPRS257
Baud rate programmable to 64K different rates
Baud rate =
LSPC1) * 8 ,
(BRR
LSPCLK
16
,
when BRR
0
=
when BRR = 0
Serial port performance is limited by I/O buffer switching speed. Internal prescalers must be adjusted such
that the peripheral speed is less than the I/O buffer speed limit—20 MHz maximum.
Data-word format
One start bit
Data-word length programmable from one to eight bits
Optional even/odd/no parity bit
One or two stop bits
Four error-detection flags: parity, overrun, framing, and break detection
Two wake-up multiprocessor modes: idle-line and address bit
Half- or full-duplex operation
Double-buffered receive and transmit functions
Transmitter and receiver operations can be accomplished through interrupt-driven or polled algorithms
with status flags.
Transmitter: TXRDY flag (transmitter-buffer register is ready to receive another character) and
TX EMPTY flag (transmitter-shift register is empty)
Receiver: RXRDY flag (receiver-buffer register is ready to receive another character), BRKDT flag
(break condition occurred), and RX ERROR flag (monitoring four interrupt conditions)
Separate enable bits for transmitter and receiver interrupts (except BRKDT)
Max bit rate
150 MHz
2
8
9.375
10
6
b s
NRZ (non-return-to-zero) format
Ten SCI module control registers located in the control register frame beginning at address 7050h
All registers in this module are 8-bit registers that are connected to Peripheral Frame 2. When a register is
accessed, the register data is in the lower byte (7
0), and the upper byte (15
8) is read as zeros. Writing
to the upper byte has no effect.
Enhanced features:
Auto baud-detect hardware logic
16-level transmit/receive FIFO
A
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TMX320C2812ZHHA 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS320R2811, TMS320R2812 Digital Signal Processors
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