
TMS370Cx9x
8-BIT MICROCONTROLLER
SPNS036B – JANUARY 1996 – REVISED FEBRUARY 1997
47
POST OFFICE BOX 1443 
 HOUSTON, TEXAS 77251–1443
analog-to-digital converter 3
The ADC3 has a separate power bus for its analog circuitry. These pins are referred to as V
CC3
 and V
SS3
. The
purpose is to enhance ADC3 performance by preventing digital switching noise of the logic circuitry that can
be present on V
SS
 and V
CC
 from coupling into the ADC3 analog stage. All ADC3 specifications are given with
respect to V
SS3
 unless otherwise noted.
Resolution 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Monotonic 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Output conversion mode 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Conversion time (excluding sample time) 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
8-bits (256 values)
Yes
00h to FFh (00 for V
I
≤
 V
SS3
≤
; FF for V
I
≤
 V
ref
)
164 t
c
recommended operating conditions
MIN
4.5
NOM
MAX
5.5
UNIT
VCC3
Analog supply voltage
5
V
VCC–0.3
VSS–0.3
2.5
VCC+0.3
VSS+0.3
VCC3 + 0.1
Vref
VSS3
Vref
Analog ground
Non-VCC3 reference
Analog input for conversion
Vref must be stable, within 
±
 1/2 LSB of the required resolution, during the entire conversion time.
V
VCC3
V
VSS3
V
operating characteristics over recommended ranges operating conditions
PARAMETER
MIN
MAX
±
1.5
±
0.9
UNIT
Absolute accuracy
Differential/integral linearity error§
VCC3 = 5.5 V
VCC3 = 5.5 V
Converting
Vrerf = 5.1 V
Vrerf = 5.1 V
LSB
LSB
ICC3
Analog supply current
2
mA
μ
A
μ
A
mA
k
k
Nonconverting
0 V 
≤
 VI 
≤
 5.5 V
5
II
Iref
Input current, AN0–AN14
2
Input charge current
1
Zref
Source impedance of V f
Source impedance of Vref
SYSCLK 
≤
 3 MHz
3 MHz < SYSCLK 
≤
 5 MHz
24
10
Absolute resolution = 20 mV. At Vref = 5 V, this is one LSB. As Vref decreases, LSB size decreases; therefore, the absolute accuracy and
differential/integral linearity errors in terms of LSBs increase.
§Excluding quantization error of 1/2 LSB