參數(shù)資料
型號： TMS320LC2407APZS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DSP CONTROLLERS
中文描述： DSP控制器
文件頁數(shù)： 77/134頁
文件大?。?/td> 1759K
代理商： TMS320LC2407APZS
TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145K
JULY 2000
REVISED AUGUST 2005
77
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
reducing current consumption
240x DSPs incorporate a unique method to reduce the device current consumption. A reduction in current
consumption can be achieved by turning off the clock to any peripheral module which is not used in a given
application. Table 17 indicates the typical reduction in current consumption achieved by turning off the clocks
to various peripherals. See the
TMS320LF/LC240xA DSP Controllers Reference Guide: System and
Peripherals
(literature number SPRU357) for further information on how to turn off the clock to the peripherals.
Table 17. Typical Current Consumption by Various Peripherals (at 40 MHz)
PERIPHERAL MODULE
CURRENT REDUCTION (mA)
CAN
8.4
EVA
6.1
EVB
6.1
ADC
3.7
SCI
1.9
SPI
1.3
This number represents the current drawn by the digital portion of the ADC module.
Turning off the clock to the ADC module results in the elimination of the current drawn
by the analog portion of the ADC (I
CCA
) as well.
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
V
LOAD
I
OL
C
T
I
OH
Output
Under
Test
50
Where:
I
OL
I
OH
V
LOAD
C
T
=
=
=
=
2 mA (all outputs)
300
μ
A (all outputs)
1.5 V
50-pF typical load-circuit capacitance
Figure 23. Test Load Circuit
signal transition levels
The data in this section is shown for the 3.3-V version. Note that some of the signals use different reference
voltages, see the recommended operating conditions table. Output levels are driven to a minimum logic-high
level of 2.4 V and to a maximum logic-low level of 0.4 V.
Figure 24 shows output levels.
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PDF描述
TMS320LC2407AVFA DSP CONTROLLERS
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相關代理商/技術參數(shù)
參數(shù)描述
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