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    參數(shù)資料
    

    


    


    
型號：
TMS320LC2407APZA

    

    
廠商：
Texas Instruments, Inc.

    

    
元件分類：
數(shù)字信號處理

    

    
英文描述：
DSP CONTROLLERS

    

    
中文描述：
DSP控制器

    

    
文件頁數(shù)：
13/134頁

    

    
文件大?。?/td>
1759K

    

    
代理商：
TMS320LC2407APZA


    

    

    

	
    
    
    

    
    
	
    TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
    TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
    DSP CONTROLLERS
    SPRS145K 
     JULY 2000 
     REVISED AUGUST 2005
    13
    POST OFFICE BOX 1443 
     HOUSTON, TEXAS 77251
    1443
    pin functions (continued)
    Table 2. LF240xA and LC240xA Pin List and Package Options
     (Continued)
    PIN NAME
    LF2407A
    (144-PGE)
    2406A
    (100-PZ)
    LC2404A
    (100-PZ)
    2403A,
    LC2402A
    (64-PAG)
    and
    2402A
    (64-PG)
    DESCRIPTION
    CONTROLLER AREA NETWORK (CAN), SERIAL COMMUNICATIONS INTERFACE (SCI), SERIAL PERIPHERAL INTERFACE (SPI)
    CANRX/
    IOPC7
    CANRX
    70
    49
    63
    CAN receive data or GPIO (LF2403A)
    (
    ↑
    )
    IOPC7
    70
    49
    49
    63
    GPIO only (2402A)
    (
    ↑
    )
    CANTX/
    IOPC6
    CANTX
    72
    50
    64
    CAN transmit data or GPIO (LF2403A)
    (
    ↑
    )
    IOPC6
    72
    50
    50
    64
    GPIO only (2402A)
    (
    ↑
    )
    SCITXD/
    IOPA0
    25
    17
    17
    43
    SCI asynchronous serial port transmit data or GPIO
    (
    ↑
    )
    SCIRXD/
    IOPA1
    26
    18
    18
    44
    SCI asynchronous serial port receive data or or
    GPIO
    (
    ↑
    )
    SPICLK/
    IOPC4
    SPICLK
    35
    24
    24
    47
    SPI clock or GPIO (LF2403A)
    (
    ↑
    )
    IOPC4
    35
    24
    24
    47
    GPIO only (2402A)
    (
    ↑
    )
    SPISIMO/
    IOPC2
    SPISIMO
    30
    21
    21
    45
    SPI slave in, master out or GPIO (LF2403A)
    (
    ↑
    )
    SPI slave out, master in or GPIO (LF2403A)
    (
    ↑
    )
    (
    ↑
    )
    IOPC2
    30
    21
    21
    45
    GPIO only (2402A)
    SPISOMI/
    IOPC3
    SPISOMI
    32
    22
    22
    46
    (
    ↑
    )
    IOPC3
    32
    22
    22
    46
    GPIO only (2402A)
    SPISTE/
    IOPC5
    SPISTE
    33
    23
    23
    SPI slave transmit enable (optional) or GPIO
    SPI slave transmit-enable (optional) or GPIO
    (
    ↑
    )
    IOPC5
    33
    23
    23
    EXTERNAL INTERRUPTS, CLOCK
    RS
    133
    93
    93
    28
    Device Reset (in) and Watchdog Reset (out).
    Device reset. RS causes the device to terminate execution
    and to set PC = 0. When RS is brought to a high level,
    execution begins at location 0x0000 of program memory.
    This pin is driven low by the DSP when a watchdog reset
    occurs. During watchdog reset, the RS pin will be driven
    low for the watchdog reset duration of 128 CLKIN cycles.
    The output buffer of this pin is an open-drain with an
    internal pullup (20 
    μ
    A, typical). It is recommended that this
    pin be driven by an open-drain device.
    (
    ↑
    )
    PDPINTA
    7
    6
    6
    36
    Power drive protection interrupt input. This interrupt, when
    activated, puts the PWM output pins (EVA) in the
    high-impedance state should motor drive/power converter
    abnormalities, such as overvoltage or overcurrent, etc.,
    arise. PDPINTA is a falling-edge-sensitive interrupt.
    (
    ↑
    )
    Bold, italicized pin names 
    indicate pin function after reset.
    GPIO 
     General-purpose input/output pin. All GPIOs come up as input after reset.
    §
    It is highly recommended that V
    CCA
     be isolated from the digital supply voltage (and V
    SSA
     from digital ground) to maintain the specified accuracy
    and improve the noise immunity of the ADC.
    Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
    #
    No power supply pin (V
    DD
    , V
    DDO
    , V
    SS
    , or V
    SSO
    ) should be left unconnected. All power supply pins must be connected appropriately for proper
    device operation.
    LEGEND:
    ↑
     Internal pullup
    ↓
     Internal pulldown
    (Typical active pullup/pulldown value is 
    ±
    16 
    μ
    A.)
    
    
    
    
    
    


    


    

    相關(guān)PDF資料
    		

    PDF描述
    		

    
    

    
TMS320LC2407APZS
DSP CONTROLLERS

    

    
TMS320LC2407AVFA
DSP CONTROLLERS

    

    
TMS320LC2407AVFS
DSP CONTROLLERS

    

    
TMS320LF2401APAGA
DSP CONTROLLERS

    

    
TMS320LF2401APAGS
DSP CONTROLLERS

    

    

    

    


    


    

    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
TMS320LC31PQ40
功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT

    

    
TMS320LC31PQL
 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:

    

    
TMS320LC31PQL40
 制造商:Rochester Electronics LLC 功能描述:- Bulk

    

    
TMS320LC50PQ50
功能描述:數(shù)字信號處理器和控制器 - DSP, DSC TMS320C50PQ - 132QFP - 50MHZ - STD RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT

    

    
TMS320LC50PQ57
功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT

    

    
    
    
    
	
    	
    
    
     
     
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