參數(shù)資料
型號(hào)： TMS320F28044ZGMA
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： Digital Signal Processor
中文描述： 數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 90/107頁(yè)
文件大?。?/td> 784K
代理商： TMS320F28044ZGMA
www.ti.com
6.10.4 I
2
C Electrical Specification and Timing
6.10.5 Serial Peripheral Interface (SPI) Master Mode Timing
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Table 6-25. I
2
C Timing
TEST CONDITIONS
MIN
MAX
400
UNIT
kHz
f
SCL
SCL clock frequency
I
2
C clock module frequency is between
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
v
il
V
ih
V
hys
V
ol
t
LOW
Low level input voltage
High level input voltage
Input hysteresis
Low level output voltage
Low period of SCL clock
0.3 V
DDIO
V
V
V
V
μ
s
0.7 V
DDIO
0.05 V
DDIO
3 mA sink current
I
2
C clock module frequency is between
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
I
2
C clock module frequency is between
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
0
0.4
1.3
t
HIGH
High period of SCL clock
0.6
μ
s
l
I
Input current with an input voltage
between 0.1 V
DDIO
and 0.9 V
DDIO
MAX
-10
10
μ
A
Table 6-26
lists the master mode timing (clock phase = 0) and
Table 6-27
lists the timing (clock
phase = 1).
Figure 6-16
and
Figure 6-17
show the timing waveforms.
90
Electrical Specifications
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