參數(shù)資料
型號: TMS320DM647ZUT720
廠商: Texas Instruments, Inc.
英文描述: Digital Media Processor
中文描述: 數(shù)字媒體處理器
文件頁數(shù): 63/166頁
文件大小: 1341K
代理商: TMS320DM647ZUT720
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P
6.3.6
Preserving Boundary-Scan Functionality on DDR2 Memory Pins
6.4 PLL1 and PLL1 Controller
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Similarly, when the DDR2 Memory Controller is not used, the V
REFSSTL
, RSV19, and RSV20 pins can be
connected directly to ground (V
SS
) to save power. However, this will prevent boundary-scan from
functioning on the DDR2 Memory Controller pins. To preserve boundary-scan functionality on the DDR2
Memory Controller pins, V
REFSSTL
, RSV11, and RSV12 should be connected as follows:
V
REFSSTL
- connect to a voltage of DVDD18/2. The DVDD18/2 voltage can be generated directly from
the D
VDD18
supply using two 1-k
resistors to form a resistor divider circuit.
RSV19 - connect this pin to ground (V
SS
) via a 200-
resistor.
RSV20 - connect this pin to the 1.8-V I/O supply (D
VDD18
) via a 200-
resistor
The primary PLL controller generates the input clock to the C64x+ megamodule (including the CPU) as
well as most of the system peripherals such as the multichannel audio serial ports (McASPs) and the
external memory interface (EMIFA).
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Peripheral Information and Electrical Specifications
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