參數(shù)資料
型號(hào)： TMS29F800B-90CDCDQ
廠商： Texas Instruments, Inc.
英文描述： 1048576 BY 8-BIT/ 524288 BY 16-BIT FLASH MEMORIES
中文描述： 1048576 8位/ 524288由16位閃存
文件頁(yè)數(shù)： 21/51頁(yè)
文件大小： 685K
代理商： TMS29F800B-90CDCDQ
TMS29F800T, TMS29F800B
1048576 BY 8-BIT/524288 BY 16-BIT
FLASH MEMORIES
SMJS835B – MAY 1997 – REVISED OCTOBER 1997
21
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
sector-protect programming
The sector-protect programming mode is activated when A6, A0, and CE are at V
IL
, and address pin A9 and
control pin OE are forced to V
ID
. Address pin A1 is set to V
IH
.The sector-select address pins A12–A18 are used
to select the sector to be protected. Address pins A0–A11 and I/O pins must be stable and can be either V
IL
or
V
IH
. Once the addresses are stable, WE is pulsed low for 100
μ
s, causing programming to begin on the falling
edge of WE and to terminate on the rising edge of WE. Figure 20 is a flowchart of the sector-protect algorithm
and Figure 21 shows a timing diagram of the sector-protect operation.
Commands to program or erase a protected sector do not change the data contained in the sector. Attempts
to program and erase a protected sector cause the data-polling bit (DQ7) and the toggle bit (DQ6) to operate
from 2 s to 100 s and then return to valid data.
sector-protect verify
Verification of the sector-protection programming is activated when WE = V
IH
, OE = V
IL
, CE = V
IL
, and address
pin A9 = V
ID
. Address pins A0 and A6 are set to V
IL
, and A1 is set to V
IH
. The sector-address pins A12–A18
select the sector that is to be verified. The other addresses can be V
IH
or V
IL
. If the sector that was selected
is protected, the DQs output 01h. If the sector is not protected, the DQs output 00h.
Sector-protect verify can also be read using the algorithm-selection command. After issuing the three-bus-cycle
command sequence, the sector-protection status can be read on DQ0. Set address pins
A0 = V
IL
, A1 = V
IH
, and A6 = V
IL
, and then the sector address pins A12–A18 select the sector to be verified.
The remaining addresses are set to V
IL
. If the sector selected is protected, DQ0 outputs a logic-high state. If
the sector selected is not protected, DQ0 outputs a logic-low state. This mode remains in effect until another
valid command sequence is written to the device. Figure 20 is a flowchart of the sector-protect algorithm and
Figure 21 shows a timing diagram of the sector-protect operation.
sector unprotect
Prior to sector unprotect, all sectors must be protected using the sector-protect programming mode. The sector
unprotect is activated when address pin A9 and control pin OE are forced to V
ID
. Address pins A1 and A6 are
set to V
IH
while CE and A0 are set to V
IL
. The sector-select address pins A12–A18 can be V
IL
or V
IH
. All sectors
are unprotected in parallel and once the inputs are stable, WE is pulsed low for 10 ms, causing the unprotect
operation to begin on the falling edge of WE and to terminate on the rising edge of WE. Figure 22 is a flowchart
of the sector-unprotect algorithm and Figure 23 shows a timing diagram of the sector-unprotect operation.
sector-unprotect verify
Verification of the sector unprotect is accomplished when WE = V
IH
, OE = V
IL
, CE =V
IL
, and address pin
A9 = V
ID
, and then select the sector to be verified. Address pins A1 and A6 are set to V
IH
, and A0 is set to V
IL
.
The other addresses can be V
IH
or V
IL
. If the sector selected is protected, the DQs output 01h. If the sector is
not protected, the DQs output 00h. Sector unprotect can also be read using the algorithm-selection command.
low V
CC
write lockout
During power-up and power-down operations, write cycles are locked out for V
CC
less than V
LKO
. If V
CC
< V
LKO
,
the command input is disabled and the device is reset to the read mode. On power up, if CE = V
IL
, WE = V
IL
,
and OE = V
IH
, the device does not accept commands on the rising edge of WE. The device automatically powers
up in the read mode.
glitching
Pulses of less than 5 ns (typical) on OE, WE, or CE do not issue a write cycle.
power supply considerations
Each device should have a 0.1-
μ
F ceramic capacitor connected between V
CC
and V
SS
to suppress circuit noise.
Printed circuit traces to V
CC
should be appropriate to handle the current demand and minimize inductance.
P
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