參數資料
型號: TMR320R2812PGFS
廠商: Texas Instruments, Inc.
元件分類: 數字信號處理
英文描述: TMS320R2811, TMS320R2812 Digital Signal Processors
中文描述: TMS320R2811,TMS320R2812數字信號處理器
文件頁數: 50/147頁
文件大小: 2021K
代理商: TMR320R2812PGFS
Peripherals
50
June 2004
SPRS257
4
Peripherals
The integrated peripherals of R281x are described in the following subsections:
32-Bit CPU-Timers 0/1/2
Three 32-bit CPU-Timers
Two event-manager modules (EVA, EVB)
Enhanced analog-to-digital converter (ADC) module
Enhanced controller area network (eCAN) module
Multichannel buffered serial port (McBSP) module
Serial communications interface modules (SCI-A, SCI-B)
Serial peripheral interface (SPI) module
Digital I/O and shared pin functions
4.1
There are three 32-bit CPU-timers on R281x devices (CPU-TIMER0/1/2).
CPU-Timer 2 is reserved for the real-time OS (such as DSP/BIOS). CPU-Timer 0/1 can be used in user
applications. These timers are different from the general-purpose (GP) timers that are present in the Event
Manager modules (EVA, EVB).
NOTE:
If the application is not using DSP/BIOS, then CPU-Timers 1 and 2 can be used in the
application.
Borrow
Reset
Timer Reload
SYSCLKOUT
TCR.4
(Timer Start Status)
TINT
16-Bit Timer Divide-Down
TDDRH:TDDR
32-Bit Timer Period
PRDH:PRD
32-Bit Counter
TIMH:TIM
16-Bit Prescale Counter
PSCH:PSC
Borrow
Figure 4
1. CPU-Timers
A
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