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14.4.8
16-bit programmable pulse generate (PPG) output mode
In the 16-bit PPG mode, TC00 and TC01 are cascaded to output the pulses that have a resolution of 16 bits
and arbitrary pulse width and duty. Two 16-bit registers, T01+00REG and T01+00PWM, are used to output the
pulses. This enables output of longer pulses than an 8-bit timer.
14.4.8.1
Setting
Setting T001CR<TCAS> to "1" connects TC00 and TC01 and activates the 16-bit mode. All the settings
of TC00 are ignored and those of TC01 are effective in the 16-bit mode.
The 16-bit PPG mode is selected by setting T01MOD<TCM1> to "11". To use the internal clock as the
source clock, set T01MOD<EIN1> to "0" and select the clock at T01MOD<TCK1>. To use an external clock
as the source clock, set T01MOD<EIN0> to "1".
Set T01MOD<DBE1> to "1" to use the double buffer.
Set the count value that corresponds to a cycle as a 16-bit value at the timer registers T01REG and T00REG.
Set the count value that corresponds to a duty pulse as a 16-bit value at T01PWM and T00PWM (hereinafter,
the 16-bit value specified by the combined setting of T01REG and T00REG is indicated as T01+00REG, and
the 16-bit value specified by the combined setting of T01PWM and T00PWM is indicated as T01+00PWM).
The timer register settings are reflected on the double buffer or T01+00PWM and T01+00REG when a write
instruction is executed on T01PWM. Be sure to execute the write instructions on T00REG, T01REG and
T00PWM before executing a write instruction on T01PWM. (When data is written to T01PWM, the set values
of the four timer registers become effective at the same time.)
Set the initial state of the PPG1 pin at T01MOD<TFF1>. Setting T01MOD<TFF1> to "0" selects the "L"
level as the initial state of the PPG1 pin. Setting T01MOD<TFF1> to "1" selects the "H" level as the initial
state of the PPG1 pin. If the PPG1 pin is set as the function output pin in the port setting while the timer is
stopped, the value of T01MOD<TFF1> is output to the PPG1 pin.
Table 14-13 shows the list of output levels
of the PPG1 pin.
Table 14-13 List of Output Levels of PPG1 Pin
TFF1
PPG1 pin output level
Before the start of
operation
(initial state)
T01+00PWM
matched
T01+00REG
matched
Operation stop-
ped
(initial state)
0
L
H
L
1
H
L
H
14.4.8.2
Operations
Setting T001CR<T01RUN> to "1" allows the up counter to increment based on the selected source clock.
When a match between the up counter value and the value set to T01+00PWM is detected, the output of the
PPG1 pin is reversed. When T01MOD<TFF1> is "0", the PPG1 pin changes from the "L" to "H" level. When
T01MOD<TFF1> is "1", the PPG1 pin changes from the "H" to "L" level. At this time, an INTTC00 interrupt
request is generated.
The up counter continues counting up. When a match between the up counter value and the value set to
T01+00REG is detected, the output of the PPG1 pin is reversed again. When T01MOD<TFF1> is "0", the
PPG1 pin changes from the "H" to "L" level. When T01MOD<TFF1> is "1", the PPG1 pin changes from the
"L" to "H" level. At this time, an INTTC01 interrupt request is generated and the up counter is cleared to
"0x0000".
TMP89FH42
Page 211
RA004