參數(shù)資料
型號： TMP320LF2407AVFS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DSP CONTROLLERS
中文描述： DSP控制器
文件頁數(shù)： 89/134頁
文件大?。?/td> 1759K
代理商： TMP320LF2407AVFS
TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145K
JULY 2000
REVISED AUGUST 2005
89
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
interrupt timing
INT refers to XINT1 and XINT2. PDP refers to PDPINTx.
switching characteristics over recommended operating conditions (see Figure 38)
PARAMETER
MIN
MAX
UNIT
t
d(
)
Delay time, PDPINTA low to PWM
high-impedance state
if bit 6 of SCSR2 = 0
(6 + 1)t
c(CO)
+ 12
(12+ 1)t
c(CO)
+ 12
ns
if bit 6 of SCSR2 = 1
ns
t
d(INT)
Delay time, INT low/high to interrupt-vector
fetch
10t
c(CO)
+ t
W
(INT)
ns
Includes i/p qualifier cycles plus synchronization plus propagation delay
timing requirements (see Figure 38)
MIN
MAX
UNIT
t
w(INT)
Pulse duration INT input low/high
Pulse duration, INT input low/high
if bit 6 of SCSR2 = 0
6t
c(CO)
ns
if bit 6 of SCSR2 = 1
12t
c(CO)
t
w(PDP)
Pulse duration PDPINTx input low
Pulse duration, PDPINTx input low
if bit 6 of SCSR2 = 0
6t
c(CO)
ns
if bit 6 of SCSR2 = 1
12t
c(CO)
This is different from 240x devices.
PWM
PDPINTx
CLKOUT
t
w(PDP)
t
d(PDP-PWM)HZ
XINT1, XINT2
t
w(INT)
Interrupt Vector
t
d(INT)
PWM refers to
all
the PWM pins in the device (i.e., PWMn and TnPWM pins). The state of the PWM pins after PDPINTx is taken
high depends on the state of the FCOMPOE bit.
A0
A15
Figure 38. External Interrupts Timing
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