參數(shù)資料
型號: TMP320F2810PBKA
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: DIGITAL SIGNAL PROCESSORS
中文描述: 數(shù)字信號處理器
文件頁數(shù): 15/103頁
文件大小: 1341K
代理商: TMP320F2810PBKA
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
APRIL 2001
REVISED SEPTEMBER 2001
15
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
memory map (continued)
The wait states for the various spaces in the memory map area are listed in Table 3.
Table 3. Wait States
AREA
WAIT-STATES
COMMENTS
M0 & M1 SARAMs
0-wait
Peripheral Frame 0
0-wait
Includes the Flash registers.
Peripheral Frame 1
0-wait (writes)
2-wait (reads)
Cycles can be extended by peripheral generated ready.
Peripheral Frame 2
0-wait (writes)
2-wait (reads)
Fixed. Cycles cannot be extended by the peripheral.
L0 & L1 SARAMs
0-wait
OTP
Programmable,
0-wait minimum
Programmed via the Flash registers.
Flash
Programmable,
0-wait minmum
Programmed via the Flash registers.
H0 SARAM
0-wait
Boot-ROM
1-wait
XINTF
Programmable,
1-wait minimum
Programmed via the XINTF registers.
Cycles can be extended by external memory or peripheral.
0-wait operation is not possible.
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