參數(shù)資料
型號： TMDS3780513A
廠商： Texas Instruments, Inc.
英文描述： TMS370 MICROCONTROLLER FAMILY DATA BOOK
中文描述： TMS370微控制器系列數(shù)據(jù)手冊
文件頁數(shù)： 41/78頁
文件大小： 919K
代理商： TMDS3780513A
GLOSSARY/SYMBOLS, TERMS, AND DEFINITIONS
1–33
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
LSB:
Least significant bit
LSbyte:
Least significant byte
M
machine code:
as hexadecimal bytes
The actual bytes read by the CPU during an instruction execution; usually read by a programmer
mask-programmed read-only memory (Mask-ROM):
is determined during manufacture by the use of a mask, the data content thereafter being unalterable
A read-only memory in which the data content of each cell
MC pin:
voltage applied to the pin. Twelve volts on the MC pin after reset places the processor in the write-protection over-
ride (WPO) mode.
Mode control pin.The pin that determines the operating mode of the TMS370 device, depending on the
memory:
A medium capable of storing information that can be retrieved.
memory map:
map depends on the operating mode.
A description of the addresses of the various sections and features of the TMS370 processor. The
microcomputer mode with external expansion:
memory extend off-chip to access external memory or peripherals
An operating mode in which the address, control, and data
microcomputer single-chip mode:
An operating mode in which the device uses only on-chip memory
microcontroller programmer:
TMS370 family devices and EPROMs directly or through an XDS
An interactive, menu-driven system that provides a method of programming
microprocessor mode with internal-program memory:
memory is available to the processor
An operating mode in which the on-chip program
microprocessor mode without internal-program memory:
memory is not available to the processor. The processor must have external memory.
An operating mode in which the on-chip program
mini-SCI:
The mini-UART function available in the PACT module.
mnemonic:
A symbol that represents the opcode part of an assembly language instruction.
MSB:
Most significant bit
MSbyte:
Most significant byte
multiprocessor communications:
data to other processors on the same serial link
An SCI format option that enables one processor to efficiently send blocks of
N
nested interrupts:
are implemented in TMS370 devices by executing an interrupt-service routine that uses the EINT, EINTL, or
EINTH instructions to set the global-interrupt-enable bits in the status register.
The ability of an interrupt to suspend the service routine of a prior interrupt. Nested interrupts
nonmaskable interrupt (NMI):
devices, INT1 can be configured as an NMI.
An interrupt that causes the processor to execute the NMI routine. On TMS370
nonreturn to zero (NRZ) format:
A communication format in which the inactive state is a logic state
nonvolatile memory:
or not
A memory in which the data content is maintained whether the power supply is connected
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