
TMC2063
PRODUCT SPECIFICATION
4
Table 2. Standards Selection
Table 3. EPROM Address Map
Output Reconstruction Filters
The 2x oversampling of internal digital data before the
output D/A converters of the TMC22091 and TMC2490 not
only reduces the Sin(x)/x high-frequency roll-off but elimi-
nates complicated reconstruction filters. This is particularly
important as the frequency response of digital filters is
dependent upon the sample rate, while the frequency of the
aliased subcarrier component is fixed. The TMC22091 and
TMC2490 encoder are designed to drive a 75
terminated both at the source and at the load (that is, a
37.5
W
load). The filters are internally source terminated.
Optional load terminations are provided on the board.
If these are not required, simply remove the appropriate links
behind the BNC connectors E9, E10, E11, E12, E13, and
E14).
W
line,
TMC22091 Operation Without a CCIR-601
Source
Only rotary switch positions 0, 1, and 2 are useful without a
D1 digital video source available. These switch positions
produce color bars and a modulated ramp. These test pat-
terns are inserted into the pixel data path after the CLUTs in
RGB format and demonstrate 90% of the circuitry of the
TMC22091. To provide a PXCK in the absence of a D1
source, switch E3 to INTernal.
Power Supply Requirements
The TMC2063P7C board requires 1.5 Amps from the +5
Volt power supply and 0.25 Amps from the -5 Volt power
supply. The -5 Volt power supply powers ECL logic devices
which have relatively good noise immunity. The +5 Volt
power supply not only drives TTL logic devices but it also
provides the power to the TMC22091 and TMC2490.
Therefore, it is recommended that a bench power supply be
used with the cable lengths kept to a minimum. When oper-
ating in stand-alone mode, only the +5 Volt supply is
required.
S1
LMB
LMB
UMB
UMB
S2
Format
NTSC
PAL B/I
NTSC-EIA
PAL-M
Memory Pages
0-15
16-31
32-47
48-63
NTSC
PAL
NTSC
PAL
Address
0
1
2
:
:
:
769
770
771
:
851
852
:
896
897
898
:
930
931
:
1023
Contents
CLUT address pointer set to 00h
Start of CLUT data
V
n-1
V
n
V
n+1
End of CLUT data
Control Register pointer set to 00h
Start of Control Register data
:
End of Control Register data
Unused locations set to 00h
:
Unused locations set to 00h
Set address pointer to 00h
Start of control register data
:
End of control register data
Unused locations set to 00h
:
Unused locations set to 00h