參數(shù)資料
型號(hào): TMC2330AG1C
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 數(shù)字信號(hào)處理外設(shè)
英文描述: Coordinate Transformer 16 x 16 Bit, 40 MOPS
中文描述: 32-BIT, DSP-COORDINATE TRANSFORM PROCESSOR, CPGA120
封裝: CERAMIC, PGA-120
文件頁數(shù): 7/18頁
文件大?。?/td> 164K
代理商: TMC2330AG1C
TMC2330A
PRODUCT SPECIFICATION
REV. 1.1.8 10/31/00
7
RTP
11
E1
This registered input selects the current transformation
mode of the device. When RTP is HIGH, the TMC2330A
executes a Rectangular-To-Polar conversion. When RTP
is LOW, a Polar-To-Rectangular conversion will be
performed.
The input and output ports are then configured to handle
data in the appropriate coordinate system.
This is a static input. See the Timing Diagram.
In applications utilizing the TMC2330A to perform
waveform synthesis and modulation in the
Polar-To-Rectangular mode (RTP=LOW), the user
determines the internal phase Accumulator structure
implemented on the next clock by setting the accumulator
control word ACC
1,0
, as shown below:
ACC
1,0
19, 18
H2, H1
ACC
1,0
Configuration
00
No accumulation performed (normal operation)
01
PM accumulator path enabled
10
FM accumulator path enabled
11
(Nonsensical) logical OR of PM and FM
where 0 = L0W, 1 = HIGH. See the Functional Block
Diagram.
The accumulator will roll over correctly when full-scale is
exceeded, allowing the user to perform continuous phase
accumulation through 2
π
radians or 360 degrees.
Note that the accumulators will also function when
RTP=HIGH (Rectangular-To-Polar), which is useful when
performing backward mapping from Cartesian to polar
coordinates. However, most applications will require that
ACC
1,0
be set to 00 to avoid accumulating the Cartesian Y
input data.
The format select control sets the numeric format of the
Rectangular data, whether input (RTP=HIGH) or output
(RTP=LOW). This control indicates two
s complement
format when TCXY=HIGH and sign-and-magnitude when
LOW. This is a static input. See the Timing Diagram.
When RTP=LOW (Polar-To-Rectangular), the Overflow
Flag will go HIGH on the clock that the magnitude of either
of the current Cartesian coordinate outputs exceeds the
maximum range. It will return LOW on the clock that the
Cartesian out-put value(s) return to full-scale or less. See
the Applications Discussion
section. Overflow is not
possible in Rectangular-To-Polar mode (RTP = HIGH).
Data in the output registers are available at the outputs of
the device when the respective asynchronous Output
Enables are LOW. When OERX or OEPY is HIGH, the
respective output port(s) is in the high impedance state.
TCXY
14
F1
OVF
105
B7
OERX,
OEPY
81, 9
E13, D1
Pin Descriptions
(continued)
Pin Name
Pin Number
Description
MQFP
CPGA/PPGA/
MPGA
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