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參數(shù)資料
| 型號： | TMC2242CR2C |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| 中文描述： | 12-BIT, DSP-DIGITAL FILTER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 89K |
| 代理商： | TMC2242CR2C |
TMC2242C
PRODUCT SPECIFICATION
3
Table 2. Package Interconnections
The output data format is two’s complement if TCO is HIGH,
inverted or offset binary if LOW. Unless all 16 output bits are
used, the user can also select either signed or unsigned input
data, via pin SO
0
(see pin description note 2, below). As
shown in pin description note 1, the output is half-LSB
rounded to the resolution selected by the value of RND
The asynchronous three-state output enable control simplifies
connection to a data bus with other drivers.
2-0
.
Signal
Type
Timing
Name
CLK
SYNC
SI
11-0
Function
Clock
Synchronization
Input Data Port
PLCC
Pin
42
43
40,
37-30,
27-25
4-11,
14-17
MQFP
Pin
36
37
34,
31-24,
21-19
42-44,
1-5,
8-11
12-15
Data In
Data Out SO
15-4
Output Data Port
Dual-
Function
Controls
SO
3-0
Output
Data; Controls
Interpolate
Decimate
Rounding
Position
Output Format
Output Enable
18-21
INT
DEC
RND
44
1
38
39
2-0
22-24
16-18
TCO
OE
2
3
40
41
Pin Assignments
65-2242C-02A
SO
12
SO
11
SO
10
SO
9
SO
8
GND
V
DD
SO
7
SO
6
SO
5
SO
4
GND
V
DD
SI
10
SI
9
SI
8
SI
7
SI
6
SI
5
SI
4
SI
3
V
DD
S
1
S
1
S
1
O
T
D
I
S
C
G
S
1
S
3
S
2
S
1
S
0
R
2
R
1
R
0
S
0
S
1
S
2
G
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
1
1
2
2
2
2
2
2
2
2
2
6
5
4
3
2
1
4
4
4
4
4
TMC2242C
65-2242C-02B
SO
12
SO
11
SO
10
SO
9
SO
8
GND
V
DD
SO
7
SO
6
SO
5
SO
4
GND
V
DD
SI
10
SI
9
SI
8
SI
7
SI
6
SI
5
SI
4
SI
3
V
DD
S
1
S
1
S
1
O
T
D
I
S
C
G
S
1
S
3
S
2
S
1
S
0
R
2
R
1
R
0
S
0
S
1
S
2
G
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
1
1
1
1
1
1
1
1
2
2
2
4
4
4
4
4
3
3
3
3
3
3
TMC2242C
44 Lead PLCC
44 Lead MQFP
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相關代理商/技術參數(shù) |
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|---|---|
| TMC2242CR2C1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
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