- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384013 > TMC2242AKTC1 (FAIRCHILD SEMICONDUCTOR CORP) Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz PDF資料下載
參數(shù)資料
| 型號(hào)： | TMC2242AKTC1 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號(hào)處理外設(shè) |
| 英文描述： | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| 中文描述： | 12-BIT, DSP-DIGITAL FILTER, PQFP44 |
| 封裝： | MQFP-44 |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大小： | 86K |
| 代理商： | TMC2242AKTC1 |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)
TMC2242A/TMC2242B
PRODUCT SPECIFICATION
3
Pin Descriptions
Pin Name
Timing Controls
INT
Pin Number
PLCC
Pin Function Description
MQFP
44
38
Interpolate.
1/2 the CLK rate and zeros are inserted in the data stream between valid input
values, reducing gain by 6dB. The TMC2242A and TMC2242B interpolate and
output results at the full CLK rate.
Decimate.
When DEC is LOW and INT is HIGH, the input data register runs at
the full CLK rate. In this mode, the TMC2242A and TMC2242B decimate and
output results at 1/2 the CLK rate.
When INT = DEC, the TMC2242A is in equal rate mode. When both INT and DEC
are HIGH, the TMC2242B is likewise in equal-rate mode, but when both INT and
DEC are LOW, the TMC2242B interpolates with unity gain.
In equal-rate mode, the input and output sample rates equal the chip clock rate.
Synchronization.
Incoming data are synchronized by holding SYNC HIGH on
CLK N–1 and LOW on CLK N when the first input data word is present on SI
If DEC = INT=1 (equal rate mode), SYNC is inactive. SYNC may be held LOW
until resynchronization is desired, or it may be toggled at 1/2 the CLK rate.
Clock.
The TMC2242A and TMC2242B operate from a single master clock. All
internal registers, except the output register in decimation mode, are strobed on
the rising edge of CLK. All timing parameters are referenced to the rising edge of
CLK.
When INT is LOW and DEC is HIGH, the input data register runs at
DEC
1
39
SYNC
43
37
11-0
.
CLK
42
36
Data Inputs
SI
11-0
40,
37-30,
27-25
34,
31-24,
21-19
Input Data Port.
edge of CLK. In Interpolate Mode, SI
(synchronized by SYNC). SI
A 12-bit 2's-complement input word is registered by the rising
11-0
is registered on every other CLK
11
is the MSB.
Data Outputs
SO
15-0
4-11,
14-21
42-44,
1-5,
8-15
Output Data Port.
rising edge of CLK. In Decimate Mode, SO
(synchronized by SYNC). SO
SO
15
is the MSB.
The limiter circuitry ensures that for internal overflow, a valid full-scale output
(7FFF or 8000) will be generated. With the TMC2242B in interpolate mode with
-6dB gain, limits are 3FFF and C000 (TCO=1).
A 16-bit 2's-complement output result is available after the
15-0
is registered on every other CLK
15-0
is rounded according to the state of RND
2-0
.
Output Controls
OE
3
41
Output Enable.
high-impedance state. OE is asynchronous with respect to CLK.
Output Format.
When TCO is HIGH, output data are in signed 2's-complement
format. When LOW, the output is inverted offset binary.
Rounding Select.
These inputs set the position of the effective LSB of the output
result. Outputs below the rounding bit are zeroed (Table 4).
When LOW, SO
15-0
are enabled. When HIGH, SO
15-0
are in a
TCO
2
40
RND
2-0
22-24
16-18
Power
V
DD
13,29,
38
12,28,
39,41
7, 23,
32
6, 22,
33, 35
Supply Voltage.
source and be decoupled to GND.
Ground.
Ground inputs should be connected to the system digital ground plane.
+5 Volt power inputs. These should come from the same power
GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC2242AKTC2 | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| TMC2242AR2C | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| TMC2242BR2C | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| TMC2242B | 12-bit In/16-bit Out, 60 MHz Digital Half-Band Interpolating/Decimating Filter(12位輸入/16位輸出,60 MHz 數(shù)字式半波段插補(bǔ)/分樣濾波器) |
| TMC2242CKTC | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2242AKTC2 | 功能描述:視頻 IC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC2242AKTCT | 功能描述:視頻 IC Interp/Decim Filter Digital HB 12B/16B RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC2242AR2C | 功能描述:視頻 IC Interp/Decim Filter Digital HB 12B/16B RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC2242AR2C1 | 功能描述:視頻 IC Interp/Decim Filter Digital HB 12B/16B RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC2242AR2C2 | 功能描述:視頻 IC Interp/Decim Filter Digital HB 12B/16B RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。