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TMC22091/TMC22191
PRODUCT SPECIFICATION
22
Control Register Definitions
(continued)
Subcarrier Registers (20-27)
Reg
20
Bit
7-0
Name
FREQL
Function
Subcarrier frequency 4th byte (LSBs). This 8-bit register holds the LSB (bits
7-0) of the 32-bit subcarrier frequency value (non-genlock modes). The next
eight most significant bits are held in Register 21.
Subcarrier frequency 3rd byte. This 8-bit register holds bits 15:8 of the
subcarrier frequency value (non-genlock modes). The next eight most
significant bits are held in Register 22.
Subcarrier frequency 2nd byte. This 8-bit register holds bits 23-16 of the
subcarrier frequency value (non-genlock modes). The eight MSBs are held in
Register 23.
Subcarrier frequency 1st byte (MSBs). This 8-bit register holds the MSBs (bits
31-24) of the 32-bit subcarrier frequency value (non-genlock modes).
Video phase offset LSBs. This 8-bit register holds the 8 LSBs of color subcarrier
phase offset during active video.
Video phase offset MSBs. This 8-bit register holds the 8 MSBs of color
subcarrier phase offset during active video.
Burst phase offset LSBs. This 8-bit register holds the 8 LSBs of burst phase
offset for color adjustment.
Burst phase offset MSBs. This 8-bit register holds the 8 MSBs of burst phase
for color adjustment.
21
7-0
FREQ3
22
7-0
FREQ2
23
7-0
FREQM
24
7-0
SYSPHL
25
7-0
SYSPHM
26
7-0
BURPHL
27
7-0
BURPHM
Test I/O Register (40)
Reg
40
Bit
7-0
Name
TESTDAT
Function
Test data input/output. This 8-bit register holds MSBs or LSBs, as determined
by the Test Control Register. This control address does not auto-increment
during read or write operations. To exit the test mode, reset the Control
Register pointer by setting A
1-0
and R/W LOW and then bring CS LOW.
Mask Register (50)
Reg
50
Bit
7-0
Name
MASK
Function
Mask register. This 8-bit register holds an 8-bit word that is logically ANDed with
the incoming data presented to the three CLUTs in color-index mode. This
register is a write-only register.
Y-Component Register (60)
Reg
60
Bit
7-0
Name
Y
Function
Y-component register. This register holds the contents of the luminance value
before the Sync and Blank Insert circuitry of the encoder. Loading the Control
Register pointer with 60
h
brings 8-bit Y values out on the D
7-0
port.