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參數(shù)資料
| 型號(hào)： | TM497FBK32S-80 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | EXTENDED DATA OUT DYNAMIC RAM MODULES |
| 中文描述： | 擴(kuò)展數(shù)據(jù)輸出動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊 |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大小： | 118K |
| 代理商： | TM497FBK32S-80 |
TM497BBK32, TM497BBK32S
4194304 BY 32-BIT
DYNAMIC RAMMODULE
SMMS433B – JANUARY 1993 – REVISED JUNE 1995
7
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timing requirements over recommended ranges of supply voltage and operating free-air
temperature
’497BBK32-60
MIN
’497BBK32-70
MIN
’497BBK32-80
MIN
UNIT
MAX
MAX
MAX
tCAH
tRHCP
tDH
tRAH
tRCH
tRRH
tWCH
tWRH
tCHR
tCRP
tCSH
tCSR
tRAD
tRAL
tCAL
tRCD
tRPC
tRSH
tREF
tT
Hold time, column address after CAS low
10
15
15
ns
Hold time, RAS high from CAS precharge
35
40
45
ns
Hold time, data after CAS low
10
15
15
ns
Hold time, row address after RAS low
10
10
10
ns
Hold time, W high after CAS high (see Note 9)
0
0
0
ns
Hold time, W high after RAS high (see Note 9)
0
0
0
ns
Hold time, W low after CAS low
10
15
15
ns
Hold time, W high after RAS low (CBR refresh only)
10
10
10
ns
Delay time, RAS low to CAS high (CBR refresh only)
10
10
10
ns
Delay time, CAS high to RAS low
5
5
5
ns
Delay time, RAS low to CAS high
60
70
80
ns
Delay time, CAS low to RAS low (CBR refresh only)
5
5
5
ns
Delay time, RAS low to column address (see Note 10)
15
30
15
35
15
40
ns
Delay time, column address to RAS high
30
35
40
ns
Delay time, column address to CAS high
30
35
40
ns
Delay time, RAS low to CAS low (see Note 10)
20
45
20
52
20
60
ns
Delay time, RAS high to CAS low (CBR only)
0
0
0
ns
Delay time, CAS low to RAS high
15
18
20
ns
Refresh time interval
32
32
32
ms
Transition time
9. Either tRRH or tRCH must be satisfied for a read cycle.
10. The maximum value is specified only to assure access time.
3
30
3
30
3
30
ns
device symbolization
TM497BBK32
YYMMT
-SS
YY
MM
= Year Code
= Month Code
= Assembly Site Code
= Speed Code
T
-SS
NOTE: The location of the part number may vary.
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