參數(shù)資料
型號(hào)： TLV5623I
廠商： Texas Instruments, Inc.
英文描述： 2.7 V TO 5.5 V LOW POWER 8-BIT DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN
中文描述： 2.7 V至5.5 V低功耗8位數(shù)字至模擬與電源降壓轉(zhuǎn)換器
文件頁數(shù)： 2/18頁
文件大小： 242K
代理商： TLV5623I
TLV5623C, TLV5623I
2.7 V TO 5.5 V LOW POWER 8-BIT DIGITAL-TO-ANALOG
CONVERTERS WITH POWER DOWN
SLAS231 – JUNE 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Serial Input
Register
16 Cycle
Timer
REFIN
CS
SCLK
FS
OUT
_
+
Power-On
Reset
DIN
8-Bit
Data
Latch
Speed/Power-Down
Logic
2
8
Update
6
1
2
3
4
7
x2
10
8
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
AGND
NO.
5
Analog ground
CS
3
I
Chip select. Digital input used to enable and disable inputs, active low.
DIN
1
I
Serial digital data input
FS
4
I
Frame sync. Digital input used for 4-wire serial interfaces such as the TMS320 DSP interface.
OUT
7
O
DAC analog output
REFIN
6
I
Reference analog input voltage
SCLK
2
I
Serial digital clock input
VDD
8
Positive power supply
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