參數資料
型號: TLV5580CPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: GREEN, PLASTIC, TSSOP-28
文件頁數: 6/36頁
文件大?。?/td> 478K
代理商: TLV5580CPWR
TLV5580
8BIT, 80 MSPS LOW POWER A/D CONVERTER
SLAS205B DECEMBER 1998 REVISED OCTOBER 2003
www.ti.com
14
PRINCIPLE OF OPERATION
The TLV5580 implements a high-speed 80 MSPS converter in a cost-effective CMOS process. Powered from
3.3 V, the single-pipeline design architecture ensures low-power operation and 8 bit accuracy. Signal input and
clock signals are all single-ended. The digital inputs are 3.3 V TTL / CMOS compatible. Internal voltage
references are included for both bottom and top voltages. Therefore the converter forms a self-contained
solution. Alternatively the user may apply externally generated reference voltages. In doing so, both input offset
and input range can be modified to suit the application.
A high-speed sampling-and-hold captures the analog input signal. Multiple stages will generate the output code
with a pipeline delay of 4.5 CLK cycles. Correction logic combines the multistage data and aligns the 8-bit output
word. All digital logic operates at the rising edge of CLK.
ANALOG INPUT
AIN
CI
S1
RSW
RS
VS
TLV5580
Figure 12. Simplified Equivalent Input Circuit
A first-order approximation for the equivalent analog input circuit of the TLV5580 is shown in Figure 12. The
equivalent input capacitance CI is 4 pF typical. The input must charge/discharge this capacitance within the
sample period of one half clock cycle. When a full-scale voltage step is applied, the input source provides the
charging current through the switch resistance RSW (200 ) of S1 and quickly settles. In this case the input
impedance is low. Alternatively, when the source voltage equals the value previously stored on CI, the hold
capacitor requires no input current and the equivalent input impedance is very high.
To maintain the frequency performance outlined in the specifications, the total source impedance should be
limited to about 80
, as follows from the equation with fCLK = 80 MHz, CI = 4 pF, RSW = 200 :
R
S t
1
÷ 2f
CLK
C
I
In(256) –R
SW
So, for applications running at a lower fCLK, the total source resistance can increase proportionally.
相關PDF資料
PDF描述
TLV5580IPWG4 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
TLV5580CPWRG4 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
TLV5580IPWRG4 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
TLV5580IDWR 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
TLV5580IPW 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
相關代理商/技術參數
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TLV5580IDW 功能描述:模數轉換器 - ADC _ RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV5580IDWG4 功能描述:模數轉換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32