參數(shù)資料
型號: TLV320DAC3100IRHBT
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: DAC WITH PROGRAMMABLE PLL, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù): 62/97頁
文件大?。?/td> 1134K
代理商: TLV320DAC3100IRHBT
www.ti.com
SLAS671 – FEBRUARY 2010
Page 0 / Register 29 (0x1D): Codec Interface Control 2
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
0000
Reserved
D3
R/W
0
0: BCLK is not inverted (valid for both primary and secondary BCLK).
1: BCLK is inverted (valid for both primary and secondary BCLK).
D2
R/W
0
BCLK and WCLK Active Even With Codec Powered Down (Valid for Both Primary and Secondary
BCLK)
0: Disabled
1: Enabled
D1–D0
R/W
00
00: BDIV_CLKIN = DAC_CLK (generated on-chip)
01: BDIV_CLKIN = DAC_MOD_CLK (generated on-chip)
10: Reserved
11: Reserved
Page 0 / Register 30 (0x1E): BCLK N_VAL
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: BCLK N-divider is powered down.
1: BCLK N-divider is powered up.
D6–D0
R/W
000 0001
000 0000: BCLK divider N = 128
000 0001: BCLK divider N = 1
000 0010: BCLK divider N = 2
...
111 1110: BCLK divider N = 126
111 1111: BCLK divider N = 127
Page 0 / Register 31 (0x1F): Codec Secondary Interface Control 1
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D5
R/W
000
000: Secondary BCLK is obtained from the GPIO1 pin.
001: Secondary BCLK is not obtained from the GPIO1 pin.
010–111: Reserved
D4–D2
R/W
000
000: Secondary WCLK is obtained from the GPIO1 pin.
001: Secondary WCLK is not obtained from the GPIO1 pin.
010–111: Reserved
D1–D0
R/W
00
00: Secondary DIN is obtained from the GPIO1 pin.
01: Secondary DIN is not obtained from the GPIO1 pin.
10–11: Reserved
Page 0 / Register 32 (0x20): Codec Secondary Interface Control 2
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
0000
Reserved
D3
R/W
0
0: Primary BCLK is fed to codec serial-interface and ClockGen blocks.
1: Secondary BCLK is fed to codec serial-interface and ClockGen blocks.
D2
R/W
0
0: Primary WCLK is fed to codec serial-interface block.
1: Secondary WCLK is fed to codec serial-interface block.
D1
R/W
0
Reserved
D0
R/W
0
0: Primary DIN is fed to codec serial-interface block.
1: Secondary DIN is fed to codec serial-interface block.
Copyright 2010, Texas Instruments Incorporated
REGISTER MAP
65
Product Folder Link(s): TLV320DAC3100
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