參數(shù)資料
型號： TLV320AIC3111IRHBT
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： AUDIO AMPLIFIER, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù)： 153/156頁
文件大?。?/td> 1701K
代理商： TLV320AIC3111IRHBT
SLAS644B – JULY 2009 – REVISED OCTOBER 2009
www.ti.com
Page 0 / Register 69: DRC Control 2
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D
R
0
Reserved. Write only the reset value to these bits.
D6–D3
R/W
0111
DRC Hold Programmability
0000: DRC Hold Disabled
0001:DRC Hold Time = 32 DAC Word Clocks
0010: DRC Hold Time = 64 DAC Word Clocks
0011: DRC Hold Time = 128 DAC Word Clocks
0100: DRC Hold Time = 256 DAC Word Clocks
0101: DRC Hold Time = 512 DAC Word Clocks
...
1110: DRC Hold Time = 4*32768 DAC Word Clocks
1111: DRC Hold Time = 5*32768 DAC Word Clocks
D2-D0
000
Reserved. Write only the reset value to these bits.
Page 0 / Register 70: DRC Control 3
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
0000
0000: DRC attack rate = 4 dB per DAC Word Clock
0001: DRC attack rate = 2 dB per DAC Word Clock
0010: DRC attack rate = 1 dB per DAC Word Clock
...
1110: DRC attack rate = 2.4414e–5 dB per DAC Word Clock
1111: DRC attack rate = 1.2207e–5 dB per DAC Word Clock
D3–D0
R/W
0000
0000: DRC decay rate = 1.5625e–2 dB per DAC Word Clock
0001: DRC decay rate = 7.8125e–3 dB per DAC Word Clock
0010: DRC decay rate = 3.9062e–3 dB per DAC Word Clock
...
1110: DRC decay rate = 9.5367e–7 dB per DAC Word Clock
1111: DRC decay rate = 4.7683e–7 dB per DAC Word Clock
Page 0 / Register 71: Left Beep Generator (1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Beep generator is disabled.
1: Beep generator is enabled (self-clearing based on beep duration).
D6
R/W
0
Reserved. Write only reset value.
D5–D0
R/W
00 0000
00 0000: Left-channel beep volume control = 2 dB
00 0001: Left-channel beep volume control = 1 dB
00 0010: Left-channel beep volume control = 0 dB
00 0011: Left-channel beep volume control = –1 dB
...
11 1110: Left-channel beep volume control = –60 dB
11 1111: Left-channel beep volume control = –61 dB
(1)
The beep generator is only available in PRB_P25 DAC processing mode.
Page 0 / Register 72: Right Beep Generator(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
00: Left and right channels have independent beep volume control.
01: Left-channel beep volume control is the programmed value of right-channel beep volume control.
10: Right-channel beep volume control is the programmed value of left-channel beep volume control.
11: Same as 00
D5–D0
R/W
00 0000
00 0000: Right-channel beep volume control = 2 dB
00 0001: Right-channel beep volume control = 1 dB
00 0010: Right-channel beep volume control = 0 dB
00 0011: Right-channel beep volume control = –1 dB
...
11 1110: Right-channel beep volume control = –60 dB
11 1111: Right-channel beep volume control = –61 dB
(1)
The beep generator is only available in PRB_P25 DAC processing mode.
96
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3111
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