參數(shù)資料
型號(hào): TLV320AIC3111IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: AUDIO AMPLIFIER, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù): 126/156頁(yè)
文件大?。?/td> 1701K
代理商: TLV320AIC3111IRHBR
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)當(dāng)前第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)
BCLK
WCLK
DIN/DOUT
n-1 n-2
1
0
n-1 n-2
1
0
LSB
MSB
LeftChannel
RightChannel
n-3
2
n-3
LSB
MSB
1/fs
www.ti.com
SLAS644B – JULY 2009 – REVISED OCTOBER 2009
The bit clock is used to clock in and clock out the digital audio data across the serial bus. When in master
mode, this signal can be programmed to generate variable clock pulses by controlling the bit-clock divider
in page 0 / register 30 (see Figure 5-36). The number of bit-clock pulses in a frame may need adjustment
to accommodate various word lengths as well as to support the case when multiple TLV320AIC3111s may
share the same audio bus.
The TLV320AIC3111 also includes a feature to offset the position of start of data transfer with respect to
the word clock. This offset can be controlled in terms of number of bit-clocks and can be programmed in
page 0 / register 28.
The TLV320AIC3111 also has the feature of inverting the polarity of the bit clock used for transferring the
audio data as compared to the default clock polarity used. This feature can be used independently of the
mode of audio interface chosen. This can be configured via page 0 / register 29, bit D3.
The TLV320AIC3111 further includes programmability (page 0 / register 27, bit D0) to place the DOUT line
in the high-impedance state during all bit clocks when valid data is not being sent. By combining this
capability with the ability to program at what bit clock in a frame the audio data begins, time-division
multiplexing (TDM) can be accomplished, enabling the use of multiple codecs on a single audio serial data
bus. When the audio serial data bus is powered down while configured in master mode, the pins
associated with the interface are put into a high-impedance output condition. Also, DOUT control on
page 0 / register 53, bit D4 allows the bus-keeper feature to be enabled/disabled. When enabled, the last
valid data on DOUT is held (weakly driven) during the non-data time. When disabled, DOUT is placed in a
high-impeance state when page 0 / register 27, bit D0 is enabled (1).
By default, when the word clocks and bit clocks are generated by the TLV320AIC3111, these clocks are
active only when the codecs (ADC, DAC or both) are powered up within the device. This is done to save
power. However, it also supports a feature when both the word clocks and bit clocks can be active even
when the codec in the device is powered down. This is useful when using the TDM mode with multiple
codecs on the same bus, or when word clocks or bit clocks are used in the system as general-purpose
clocks.
5.8.1.1
Right-Justified Mode
The audio interface of the TLV320AIC3111 can be put into the right-justified mode by programming
page 0 / register 27, bits D7–D6 = 10. In right-justified mode, the LSB of the left channel is valid on the
rising edge of the bit clock preceding the falling edge of the word clock. Similarly, the LSB of the right
channel is valid on the rising edge of the bit clock preceding the rising edge of the word clock.
Figure 5-39. Timing Diagram for Right-Justified Mode
For the right-justified mode, the number of bit clocks per frame should be greater than or equal to twice
the programmed word length of the data.
Copyright 2009, Texas Instruments Incorporated
APPLICATION INFORMATION
71
Product Folder Link(s): TLV320AIC3111
相關(guān)PDF資料
PDF描述
TLV320AIC3120IRHBR AUDIO AMPLIFIER, PQCC32
TLV320AIC3120IRHBT AUDIO AMPLIFIER, PQCC32
TLV320AIC31IRHBRG4 SPECIALTY CONSUMER CIRCUIT, PQCC32
TLV320AIC31IRHBR SPECIALTY CONSUMER CIRCUIT, PQCC32
TLV320AIC31IRHBTG4 SPECIALTY CONSUMER CIRCUIT, PQCC32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC3111IRHBT 功能描述:接口—CODEC Low-Pwr Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC3120 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Mono Audio Codec With Embedded miniDSP and Mono Class-D Speaker Amplifier
TLV320AIC3120EVM-U 功能描述:音頻 IC 開(kāi)發(fā)工具 TLV320AIC3120EVM-U Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
TLV320AIC3120IRHBR 功能描述:接口—CODEC Low-Pwr Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC3120IRHBT 功能描述:接口—CODEC Low-Pwr Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel