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I
2
C BUS DEBUG IN A GLITCHED SYSTEM
Occasionally, some systems may encounter noise or glitches on the I
2
C bus. In the unlikely event that this
affects bus performance, then it can be useful to use the I
2
C Debug register. This feature terminates the I
2
C bus
error allowing this I
2
C device and system to resume communications. The I
2
C bus error detector is enabled by
default. The TLV320AIC3106 I
2
C error detector status can be read from Page 0, Register 107, bit D0. If desired,
the detector can be disabled by writing to Page 0, Register 107, bit D2.
DIGITAL AUDIO DATA SERIAL INTERFACE
Audio data is transferred between the host processor and the TLV320AIC3106 via the digital audio data serial
interface, or
audio bus
. The audio bus on this device is very flexible, including left or right justified data options,
support for I
2
S or PCM protocols, programmable data length options, a TDM mode for multichannel operation,
very flexible master/slave configurability for each bus clock line, and the ability to communicate with multiple
devices within a system directly.
Audio Serial Data Bus
DOUT
GPIO1 GPIO2
MFP3
WCLK
BCLK
DIN
TLV320AIC3106
SLAS509B–DECEMBER 2006–REVISED JUNE 2007
Similarly, in the case of an I
2
C register read, after the device has sent out the 8-bit data from the addressed
register, if the master issues an ACKNOWLEDGE, the slave takes over control of SDA bus and transmit for the
next 8 clocks the data of the next incremental register.
The data serial interface uses two sets of pins for communication between external devices, with the particular
pin used controlled through register programming. This configuration is shown in
Figure 18
below.
Figure 18. Alternate Audio Bus Mulitplexing Function
In cases where MFP3 is needed for a secondary device digital input, the TLV320AIC3106 must be used in I
2
C
mode (when in SPI mode, MFP3 is used as the SPI bus MOSI pin and thus cannot be used here as an alternate
digital input source).
This mux capability allows the TLV320AIC3106 to communicate with two separate devices with independent
I
2
S/PCM buses. An example of such an application is a cellphone containing a Bluetooth transceiver with
PCM/I
2
S interface, as shown in
Figure 19
. The applications processor can be connected to the WCLK, BCLK,
DIN, DOUT pins on the TLV320AIC3106, while a Bluetooth device with PCM interface can be connected to the
GPIO1, GPIO2, MFP3, and DOUT pins on the TLV320AIC3106. By programming the registers via I
2
C control,
the applications processor can determine which device is communicating with the TLV320AIC3106. This is
attractive in cases where the TLV320AIC3106 can be configured to communicate data with the Bluetooth device,
then the applications processor can be put into a low power sleep mode, while voice/audio transmission still
occurs between the Bluetooth device and the TLV320AIC3106.
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