參數(shù)資料
型號(hào): TLV320AIC29IRGZRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, QFN-48
文件頁數(shù): 78/87頁
文件大?。?/td> 1051K
代理商: TLV320AIC29IRGZRG4
TLV320AIC29
SLAS494B DECEMBER 2005 REVISED OCTOBER 2007
www.ti.com
8
Interchannel isolation
CP_IN to CP_OUT (Differential)
80
dB
Mute attenuation
CP_OUT (Differential) muted
120
dB
(1) DAC PSRR measurement is calculated as:
PSRR
+ 20 log
10
VSIGsup
V
SPK1 2
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CP_INP TO 32
RECEIVER
(SPK1OUT32N)
1020-Hz Sine wave input on CP_IN, Load on
SPK1OUT32N = 32
(Differential), 50 pF
Full-scale input voltage (0 dB)
0.707
Vrms
Input common mode
1.5
V
Full-scale output voltage (0 dB)
1.697
Vrms
Output common mode
1.5
V
SNR
97
dBA
THD
82
dB
CP_IN TO (Differential) in to 32
1020-Hz Sine wave input on
CP_INPCP_OUTN, Load on
SPK1OUT32N = 32
(Differential), 50 pF
Full-scale input voltage (0 dB)
1.414
Vrms
Input common mode
1.5
V
Full-scale output voltage (0 dB)
1.697
Vrms
Output common mode
1.5
V
SNR
Measured as idle channel noise, Aweighted
85
101
dBA
THD
0 dBFs input, 0 dB gain
82
60
dB
217 Hz, 100 mV on AVDD1/AVDD2/DRVDD
74
PSRR
1020 Hz, 100 mV on
AVDD1/AVDD2/DRVDD
74
dB
Interchannel isolation
85
dB
Mute attenuation
120
dB
Maximum output power
82
mW
DIGITAL INPUT/OUTPUT
Logic family
CMOS
Logic level:
VIH
IIH = +5 A, IOVDD > 1.5 V
0.7IOVDD
V
Logic level:
VIH
IIH = +5 A, IOVDD < 1.5 V
0.9IOVDD
V
VIL
IIL = +5 A
0.3
0.3IOVDD
V
VOH
IOH = 2 TTL loads
0.8IOVDD
V
VOL
IOL = 2 TTL loads
0.1IOVDD
V
Capacitive load
10
pF
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