TLV320AIC27
STEREO AUDIO CODEC
SLAS253A – MARCH 2000 – REVISED SEPTEMBER 2000
37
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
vendor reserved registers (index 5Ah and 7Ah) (continued)
Table 19. Vendor Register 5Ah Bit Allocation and Default States
BIT
NAME
DEFAULT
ACTION WHEN SET TO 1
Test-only bits – not normal use
AEV
ADC evaluation
0
ADC evaluation mode select bit – do not use
BB
BIASBOOST
0
Increases analog bias currents by 50%
TRM
TSTRECMUX
0
Enables record mux test mode. RECMUX outputs summed into the front and rear DAC output path.
HIC
HALFICONV
0
Halves bias current to the converters
HIM
MALFIMIX
0
Halves bias current to the mixer block
DDS
Dither disable
0
Disables ADC and DAC digital dither – do not use
RTS
RAM test mode
0
Digital test mode – do not use
DFT
DAC FIT test
0
Digital test mode – do not use
AFT
ADC FIR test
0
Digital test mode – do not use
DTS
DAC test
0
Digital test mode – do not use
ATS
ADC test
0
Digital test mode – do not use
User bits
AND
ADC no DAC
0
Select stereo mix into ADC as having no DAC signal
R2S
Rev 2.1 switch
0
Closes Rev 2.1 switch when set (see Figure 15)
I2S
I2S enable
0
Enables I2S data and clock onto GPIO pins 43, 44, 48
DLM
Dual line modem
0
Selects support for line2 DAC and ADC slots
AMD
Automute disable
0
Disables automute function on the front and rear DACs
vendor-specific gain control registers – (index 70h to 74h)
These three registers control the gain and mute functions applied to the front and rear mixer paths, and the rear
channel DAC gains. These PGAs are not accommodated in the Intel specification, but are required in order to
build a flexible quad surround sound device. The function is as per the other mixer PGAs. However, the default
value of the register changes depending upon the mode of operation of the device is, as shown in Table 20.
Table 20. Vendor-Specific PGA Default Values, Vendor ID Registers (Index 7Ch to 7Eh)
DEFAULT VALUE FOR REGISTER
MODE
REAR DAC – REG 70H
FRONT MIXER – REG 72H
REAR MIXER – REG 74H
REV 2.1
SWITCH
Rev 2.1 (00)
8808
0808
8808
Closed
Rev 2.1 six-channel (01)
8808
0808
8808
Closed
Quad (10)
8808
0808
Open
Modem (11)
0808
Open
This register is use for specific vendor identification, if so desired. The ID method is Microsoft’s
plug and play
vendor ID code. The first character of that ID is F7 to F0, the second character is S7 to S0, and the third character
is T7 to T0. These three characters are ASCII encoded. The REV7 to REV0 field is for the vendor revision
number. For the TLV320AIC27, the vendor ID is set to TXN3 if MODE1 = 0, and to TXN4 if MODE1 = 1.
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