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參數(shù)資料
| 型號(hào)： | TLV320AIC23IGQER |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | Stereo Audio CODEC, 8-to 96-kHz, With Integrated Headphone Amplifier |
| 中文描述： | 立體聲音頻編解碼器，8到96千赫，具有集成耳機(jī)放大器 |
| 文件頁數(shù)： | 29/44頁 |
| 文件大?。?/td> | 236K |
| 代理商： | TLV320AIC23IGQER |
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3
–
9
3.3.2
Audio Sampling Rates
The TLV320AIC23 can operate in master or slave clock mode. In the master mode, the TLV320AIC23 clock and
sampling rates are derived from a 12-MHz MCLK signal. This 12-MHz clock signal is compatible with the USB
specification. The TLV320AIC23 can be used directly in a USB system.
In the slave mode, an appropriate MCLK or crystal frequency and the sample rate control register settings control
the TLV320AIC23 clock and sampling rates.
The settings in the sample rate control register control the clock mode and sampling rates.
Sample Rate Control (Address: 0001000)
BIT
D8
D7
D6
D5
D4
D3
D2
D1
D0
Function
X
CLKOUT
CLKIN
SR3
SR2
SR1
SR0
BOSR
USB/Nor-
mal
Default
0
0
0
0
0
0
0
0
0
CLKOUT
CLKIN
SR[3:0]
BOSR
Clock output divider
Clock input divider
Sampling rate control (see Sections 3.3.2.1 and 3.3.2.2)
Base oversampling rate
USB mode:
0 = 250 f
s
Normal mode:
0 = 256 f
s
Clock mode select:
0 = Normal
Reserved
0 = MCLK
0 = MCLK
1 = MCLK/2
1 = MCLK/2
1 = 272 f
s
1 = 384 f
s
1 = USB
USB/Normal
X
The clock circuit of the AIC23 has two internal dividers. The first, controlled by CLKIN, applies to the sampling-rate
generator of the codec. The second, controlled by CLKOUT, applies only to the CLKOUT terminal. By setting CLKIN
to 1, the entire codec is clocked with half the frequency, effectively dividing the resulting sampling rates by two. The
following sampling-rate tables are based on CLKIN = MCLK.
3.3.2.1 USB-Mode Sampling Rates (MCLK = 12 MHz)
In the USB mode, the following ADC and DAC sampling rates are available:
SAMPLING RATE
SAMPLING-RATE CONTROL SETTINGS
SAMPLING RATE CONTROL SETTINGS
ADC
(kHz)
DAC
(kHz)
FILTER TYPE
SR3
SR2
SR1
SR0
BOSR
96
88.2
48
44.1
32
8.021
8
48
44.1
8
8.021
96
88.2
48
44.1
32
8.021
8
8
8.021
48
44.1
3
2
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
1
1
0
0
1
0
0
0
0
0
0
1
1
0
0
1
1
1
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
1
0
1
0
1
0
0
1
0
1
The sampling rates are derived from the 12-MHz master clock. The available oversampling rates do not produce exactly 8-kHz, 44.1-kHz, and
88.2-kHz sampling rates, but 8.021 kHz, 44.117 kHz, and 88.235 kHz, respectively. See Figures 3
–
17 through 3
–
34 for filter responses
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| TLV320AIC23IPW | 功能描述:接口—CODEC LP Port Audio RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC23IPWG4 | 功能描述:接口—CODEC LP Port Audio RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC23IPWR | 功能描述:接口—CODEC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC23IPWRG4 | 功能描述:接口—CODEC 256 x 18 3.3-V Synch FIFO Memory RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC23PW | 功能描述:接口—CODEC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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