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參數(shù)資料
| 型號： | TLP561G |
| 廠商： | Toshiba Corporation |
| 英文描述： | Triac Driver Programmable Controllers AC−Output Module Solid State Relay |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 152K |
| 代理商： | TLP561G |
TLP561G
2002-09-25
3
Individual Electrical Characteristics
(Ta = 25°C)
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Forward voltage
V
F
I
F
= 10mA
1.0
1.15
1.3
V
Reverse current
I
R
V
R
= 5V
―
―
10
μA
L
Capacitance
C
T
V = 0, f = 1MHz
―
30
―
pF
Peak off state current
I
DRM
V
DRM
= 400V
―
10
100
nA
Peak on state voltage
V
TM
I
TM
= 100mA
―
1.7
3.0
V
Holding current
I
H
―
―
0.6
―
mA
Critical rate of rise of
off state voltage
dv / dt
V
in
= 120V
rms
, Ta = 85°C
(Fig.1)
200
500
―
V / μs
D
Critical rate or rise of
commutating voltage
dv / dt (c)
V
in
= 30V
rms
, I
T
= 15mA
(Fig.1)
―
0.2
―
V / μs
Coupled Electrical Characteristics
(Ta = 25°C)
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Trigger LED current
I
FT
V
T
= 3V, R
L
= 100
―
5
10
mA
Inhibit voltage
V
IH
I
F
= rated I
FT
―
―
40
V
Leakage in inhibited state
I
IH
I
F
= rated I
FT
V
T
= rated V
DRM
―
100
300
μA
Capacitance
(input to output)
C
S
V
S
= 0, f = 1MHz
―
0.8
―
pF
Isolation resistance
R
S
V
S
= 500V
5×10
10
10
14
―
AC, 1 minute
2500
―
―
AC, 1 second, in oil
―
5000
―
V
rms
Isolation voltage
BV
S
DC, 1 minute, in oil
―
5000
―
V
dc
Fig.1: dv / dt test circuit
dv / dt
(
)
dv / dt
5V, V
CC
0V
1
2
3
6
4
R
in
4k
120
V
CC
V
in
–
+
R
L
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