參數(shù)資料
型號: TLP113
廠商: Toshiba Corporation
英文描述: Isolated Line Receiver Simplex / Multiplex Data Transmission Computer.Peripheral Interface Microprocessor System Interface Digital Isolation For A / D
中文描述: 隔離線接收單純/多路數(shù)據(jù)傳輸Computer.Peripheral接口微處理器系統(tǒng)接口數(shù)字隔離A / D轉(zhuǎn)換
文件頁數(shù): 4/8頁
文件大?。?/td> 218K
代理商: TLP113
TLP113
2002-09-25
4
Switching Characteristics
(V
CC
=5V, Ta=25°C)
Characteristic
Symbol
Test
Cir
cuit
Test Condition
Min.
Typ.
Max.
Unit
Propagation delay time
(H
L)
t
p
HL
1
I
F
=0
16mA
C
L
=15pF, R
L
=350
60
120
ns
Propagation delay time
(L
H)
t
p
LH
1
I
F
=16
0mA
C
L
=15pF, R
L
=350
60
120
ns
Output rise fall time
(10 90%)
t
r
, t
f
2
R
L
=350 , C
L
=15pF
I
F
=0
16mA
30
ns
Common mode transient
imunity at high output
level
CM
H
2
I
F
=0mA, V
CM
=200V
p p
V
O(min)
=2V, R
L
=350
200
V / s
Common mode transient
imunity at low output
level
CM
L
2
I
F
=16mA, V
CM
=200V
p p
V
O(max)
=0.8V,
R
L
=350
500
V / s
(Note 4) Device considered a two terminal device: Pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted
together.
(Note 5) The V
CC
supply voltage to each TLP113 isolator must be bypassed by 0.1 F capacitor, this can be either a
ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as
close as possible to package V
CC
and GND pins of each device.
(Note 6) Maximum electrostatic discharge voltage for any pins: 180V(C=200pF, R=0)
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