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參數(shù)資料
| 型號： | TLE6230GP |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Smart Octal Low-Side Switch |
| 中文描述： | 智能八路低端開關(guān) |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 746K |
| 代理商： | TLE6230GP |
Data Sheet TLE 6230 GP
V2.1
Page
26. Aug. 2002
6
Electrical Characteristics cont.
Parameter and Conditions
Symbol
Values
Unit
V
S
= 4.5 to 5.5 V ;
T
j
= - 40 °C to + 150 °C ; Reset = H
(unless otherwise specified)
min
typ
max
5. Diagnostic Functions
Open Load Detection Voltage
Output Pull Down Current
Fault Delay Time
Short to Ground Detection Voltage
Short to Ground Detection Current
Current Limitation; Overload Threshold Current
Overtemperature Shutdown Threshold
6
Hysteresis
6
V
DS(OL)
I
PD(OL)
t
d(fault)
V
DS(SHG)
I
SHG
I
D(lim) 1...8
T
th(sd)
T
hys
V
S
-2.5 V
S
-2
50
50
V
S
–3.3 V
S
-2.9V
S
-2.5
-50
-100
1
1.5
170
--
10
V
S
-1.3
150
200
V
μA
μs
V
μA
A
°C
K
90
100
-150
2
200
--
--
6. SPI-Timing
Serial Clock Frequency (depending on SO load)
Serial Clock Period (1/fclk)
Serial Clock High Time
Serial Clock Low Time
Enable Lead Time (falling edge of
CS
to rising edge of
CLK
)
f
SCK
t
p(SCK)
t
SCKH
t
SCKL
t
lead
DC
200
50
50
250
--
--
--
--
--
5
--
--
--
--
MHz
ns
ns
ns
ns
Enable Lag Time (falling edge of CLK to rising edge of
CS
)
t
lag
Data Setup Time (required time SI to falling of CLK)
Data Hold Time (falling edge of CLK to SI)
Disable Time @ C
L
= 50 pF
6
Transfer Delay Time
7
(
CS
high time between two accesses)
Data Valid Time
250
20
20
--
200
---
--
--
--
--
--
--
--
150
--
ns
ns
ns
ns
ns
t
SU
t
H
t
DIS
t
dt
C
L
= 50 pF
6
C
L
= 100 pF
6
C
L
= 220 pF
6
t
valid
--
--
--
110
120
150
160
170
200
ns
6
This parameter will not be tested but guaranteed by design
7
This time is necessary between two write accesses. To get the correct diagnostic information, the transfer delay
time has to be extended to the maximum fault delay time t
d(fault)max
= 200μs.
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