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| 型號(hào)： | TLE6228GP |
| 廠(chǎng)商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Smart Quad Channel Low-Side Switch |
| 中文描述： | 智能四通道低側(cè)開(kāi)關(guān) |
| 文件頁(yè)數(shù)： | 5/18頁(yè) |
| 文件大?。?/td> | 753K |
| 代理商： | TLE6228GP |
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Datasheet TLE 6228 GP
V3.1
Page
26. Aug. 2002
5
Electrical Characteristics
Parameter and Conditions
V
S
= 4.8 to 18 V ; T
j
= - 40 °C to + 150 °C
(unless otherwise specified)
Symbol
Values
min
Unit
typ
max
1. Power Supply (V
S
)
Supply current (Outputs ON)
Supply current (Outputs OFF)
V
ENA
= L, V
STBY
= H
Standby current
Operating voltage
I
S
I
S
8
4
mA
mA
V
STBY
= L
I
S
V
S
10
32
μA
4.8
V
2. Power Outputs
ON state resistance Channel 1,2
I
D
= 1A; V
S
≥
9.5 V
ON state resistance Channel 3,4
I
D
= 1A; V
S
≥
9.5 V
Z-Diode clamping voltage (OUT1...4)
Pull down current
Output leakage current
3
Output turn on time
4
Output turn off time
4
Output on fall time
4
Output off rise time
4
Overload switch-off delay time
4
Output off status delay time
4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time
5
T
j
= 25
°
C
T
j
= 150°C
T
j
= 25
°
C
T
j
= 150°C
I
D
≥
100 mA
V
STBY
= H, V
IN
= L
V
STBY
= L, 0V
≤
V
DS
≤
20V
R
DS(ON)
0.23
0.26
0.5
0.4
0.75
60
50
R
DS(ON)
0.28
V
DS(AZ)
I
PD
I
Dlk
t
on
t
off
t
fall
t
rise
t
DSO
t
D
t
D-failure
t
D-IN
t
fOL(off)
45
10
V
20
μA
μA
μs
5
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
3
3
3
3
20
500
500
500
10
15
20
10
5
60
1200
1200
1200
30
50
60
30
30
100
3000
3000
3000
100
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)
Input low voltage
Input high voltage
Input voltage hysteresis
5
Input pull down current V
IN
= 5 V; V
S
≥
6.5 V
Enable pull down current V
ENA
= 5 V; V
S
≥
6.5 V
V
INL
V
INH
V
INHys
I
IN
I
ENA
- 0.3
2.0
50
10
10
1.0
6.0
V
V
200
30
20
mV
μA
μA
60
40
4. Digital Status Outputs (ST1 - ST4) Open Drain
Output voltage low
Leakage current high
I
ST
= 2 mA
V
STL
I
STH
0.5
V
2
μA
3
If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA
4
See timing diagram, resistive load condition; V
S
≥
9 V
5
This parameter will not be testet but assured by design
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