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參數(shù)資料
| 型號： | TLE6214L |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Smart Dual Current Sense Switch |
| 中文描述： | 智能雙電流檢測開關(guān) |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 344K |
| 代理商： | TLE6214L |
SPI
The SPI is a
S
erial
P
eripheral
I
nterface with 4 digital pins
and an 8 bit shift register. The SPI is used to configure and
program the device, turn on and off channels and to read
detailed diagnostic information.
Note: The default setting of the TLE614L is to use the the
SO/ST2 pin as status output pin for channel 2. To activate
the SO function of the SPI the command "I/O Configure" (see. SPI commands: No.3) has to be used
to reconfigure the IC. (e.g. 0111 xxxx)
SPI Signal Description:
Preliminary Datasheet TLE 6214 L
V2 Preliminary
Page
25.06.2003
7
CS
- Chip Select. The system microcontroller selects the TLE 6214 L by means of the CS pin. When-
ever the pin is in a logic low state, data can be transferred from the μC and vice versa.
CS = H :
Any signals at the SCLK and SI
pins are ignored and SO is forced into a
high impedance state.
CS = H
L :
diagnostic information is transferred
from the diagnosis register into the SPI
shift register. (in sleep mode no tranfer
of diagnostic information)
serial input data can be clocked into the
SPI shift register from then on
SO changes from high impedance state
to logic high or low state corresponding to the SO bits
CS = L :
SPI is working like a shift register. With each clock signal at the SCLK pin the state of the SI is
read into the SPI shift-register (falling clock edge) and one diagnosis bit is written out of SO (rising ris-
ing edge).
CS = L
transfer of SI bits from SPI shift register into the internal logic registers
reset of diagnosis register if sent command was valid
To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low
transition of CS.
SCLK
- Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 6214 L. The
serial input (SI) accepts data into the input SPI shift register on the falling edge if while the serial output
(SO) shifts diagnostic information out of the SPI shift register on the rising edge of serial clock. It is es-
sential that the SCLK pin is in a logic low state whenever chip select CS makes any transition.
SI
- Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI infor-
mation is read in on the falling edge . Input data is latched in the SPI shift register and then transferred
to the internal registers of the logic.
The input data consist of 8 bit, made up of x control bits and y data bits. The control word is used to
program the device, to operate it in a certain mode as well as providing diagnostic information (see SPI
Commands).
SO
- Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB)
first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will
appear at the SO pin following the rising edge.
H:
internal logic registers
diagnosis register
8 bit SPI shift register
SI
SO
CS
CS
MSB
MSB
LSB
LSB
Serial input
data MSB first
Serial output
(diagnosis)
MSB first
SPI
CS
SCLK
SI
SO
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| TLE6214L_04 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Dual Current Sense Switch |
| TLE6214LNT | 制造商:Infineon Technologies AG 功能描述:Current Limit SW 2-IN 2-OUT -0.3V to 7V 8A/12A 12-Pin DSO |
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| TLE6216C | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Quad Channel Low-Side Switch |
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