參數(shù)資料
型號: TLE6208-3G
廠商: INFINEON TECHNOLOGIES AG
元件分類: 運動控制電子
英文描述: BRUSH DC MOTOR CONTROLLER, PDSO14
封裝: PLASTIC, DSOP-14
文件頁數(shù): 16/22頁
文件大小: 409K
代理商: TLE6208-3G
TLE 6208-3 G
Data Sheet
3
2007-09-12
1.3
Pin Definitions and Functions
Pin No.
Symbol
Function
1GND
Ground; Reference potential; internal connection to pin 7, 8 and 14;
cooling tab; to reduce thermal resistance place cooling areas on PCB
close to these pins.
2OUT3
Halfbridge-Output 3;
Internally contected to Highside-Switch 3 and Lowside-Switch 3. The
HS-Switch is a Power-MOS open drain with internal reverse diode;
The LS-Switch is a Power-MOS open source with internal reverse
diode; no internal clamp diode or active zenering;
short circuit protected and open load controlled.
3
VS
Power Supply;
needs a blocking capacitor as close as possible to GND Value: 22
F
electrolytic in parallel to 220 nF ceramic.
5DI
Serial Data Input; receives serial data from the control device; serial
data transmitted to DI is an 16bit control word with the Least
Significant Bit (LSB) being transferred first: the input has an active
pull down and requires CMOS logic level inputs;
DI will accept data on the falling edge of CLK-signal;
see Table Input Data Protocol.
4CSN
Chip-Select-Not Input; CSN is an active low input; serial
communication is enabled by pulling the CSN terminal low; CSN
input should only be transitioned when CLK is low; CSN has an
internal active pull up and requires CMOS logic level inputs.
6CLK
Serial Clock Input; clocks the shiftregister; CLK has an internal
active pull down and requires CMOS logic level inputs.
7, 8, 14
GND
Ground; see pin 1.
9DO
Serial-Data-Output; this 3-state output transfers diagnosis data to
the control device; the output will remain 3-stated unless the device
is selected by a low on Chip-Select-Not (CSN);
see Table Diagnosis Data Protocol.
10
INH
Inhibit Input; has an internal pull down;
device is switched in standby condition by pulling the INH terminal
low.
11
VCC
Logic Supply Voltage;
needs a blocking capacitor as close as possible to GND;
Value: 10
F electrolytic in parallel to 220 nF ceramic.
12
OUT2
Halfbridge-Output 2; see pin 2.
13
OUT1
Halfbridge-Output 1; see pin 2.
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