參數(shù)資料
型號(hào): TLE4279GM
廠商: SIEMENS A G
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 5-V Low-Drop Fixed Voltage Regulator
中文描述: 5 V FIXED POSITIVE LDO REGULATOR, 0.5 V DROPOUT, PDSO14
文件頁(yè)數(shù): 5/19頁(yè)
文件大?。?/td> 242K
代理商: TLE4279GM
TLE 4279
Semiconductor Group
5
1998-11-01
Circuit Description
The control amplifier compares a reference voltage, made highly accurate by resistance
balancing, with a voltage proportional to the output voltage and drives the base of the
series PNP transistor via a buffer. Saturation control as a function of the load current
prevents any over-saturation of the power element.
In the reset generator block a comparator compares a reference voltage independent of
the input voltage with the scaled-down output voltage. If the output voltage reaches 4.6 V
the reset delay capacitor is discharged and the reset output is set to low. This low is
guaranteed down to an output voltage of 1 V. As the output voltage increases again,
from 4.6 V onward the reset delay capacitor is charged with constant current. When the
capacitor voltage reaches the upper switching threshold
V
dt
, the reset returns to high. By
choosing the value of this capacitor, the reset delay time can be selected over a wide
range. With the reset threshold input RE it is possible to lower the reset threshold
V
rt
. If
pin RE is connected to pin Q via a voltage divider, for example, the reset condition is
reached when this voltage is decreased below the switching threshold
V
re
of 1.35 V.
Another comparator compares the signal of the pin SI, normally fed by a voltage divider
from the input voltage, with the reference and gives an early warning on the pin SO. It is
also possible to superwise an other voltage e.g. of a second regulator, or to build a
watchdog circuit with few external components.
Application Description
The input capacitor
C
I
is necessary for compensating line influences. Using a resistor of
approx. 1
in series with
C
I
, the oscillating circuit consisting of input inductivity and input
capacitance can be damped. The output capacitor
C
Q
is necessary for the stability of the
regulating circuit. Stability is guaranteed at values
10
μ
F and an ESR
10
within the
operating temperature range. Both reset output and sense output are open collector
outputs and have to be connected to 5 V output via external pull-up resistors
10 k
.
For small tolerances of the reset delay the spread of the capacitance of the delay
capacitor and its temperature coefficient should be noted.
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