參數(shù)資料
型號: TLC551Y
廠商: Texas Instruments, Inc.
元件分類: 定時(shí)器
英文描述: LinCMOSE TIMERS
中文描述: LinCMOSE定時(shí)器
文件頁數(shù): 10/16頁
文件大?。?/td> 277K
代理商: TLC551Y
TLC551, TLC551Y
LinCMOS
TIMERS
SLFS044B – FEBRUARY 1984 – REVISED SEPTEMBER 1997
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
0.1
μ
F
0.1
μ
F
CT
CL
RL
Output
RB
RA
GND
1
TRIG
THRES
RESET
DISCH
CONT
VDD
OUT
VDD
2/3 VDD
1/3 VDD
GND
tPHL
tPLH
tc(H)
tc(L)
CIRCUIT
TRIGGER AND THRESHOLD VOLTAGE WAVEFORM
TLC551
3
8
5
4
7
6
2
VDD
Figure 3. Astable Operation
Connecting TRIG to THRES, as shown in Figure 3, causes the timer to run as a multivibrator. The capacitor C
T
charges through R
A
and R
B
to the threshold voltage level (approximately 0.67 V
DD
) and then discharges through R
B
only to the value of the trigger voltage level (approximately 0.33 V
DD
). The output is high during the charging cycle
(t
c(H)
) and low during the discharge cycle (t
c(L)
). The duty cycle is controlled by the values of R
A
, and R
B
, and C
T
, as
shown in the equations below.
tc(H)
tc(L)
Period
CT(RA
CTRBIn 2
tc(H)
RB) In 2 (In 2
0.693)
tc(L)
CT(RA
2RB) In 2
Output driver duty cycle
tc(L)
tc(H)
tc(L)
tc(H)
1 –
RB
RA
2RB
Output waveform duty cycle
tc(H)
tc(L)
RB
RA
2RB
The 0.1-
μ
F capacitor at CONT in Figure 3 decreases the period by about 10%.
The formulas shown above do not allow for any propagation delay times from TRIG and THRES to DISCH. These
delay times add directly to the period and create differences between calculated and actual values that increase with
frequency. In addition, the internal on-state resistance r
on
during discharge adds to R
B
to provide another source of
timing error in the calculation when R
B
is very low or r
on
is very high.
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