- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98238 > TLC320AC01CFN (TEXAS INSTRUMENTS INC) SPECIALTY ANALOG CIRCUIT, PQCC28 PDF資料下載
參數(shù)資料
| 型號： | TLC320AC01CFN |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 13/93頁 |
| 文件大小： | 601K |
| 代理商： | TLC320AC01CFN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁
2–7
2.8.2
Notes on TLC320AC01/02 AIC Master-Slave Operation
Master/slave operational detail is summarized in the following notes:
1.
The slave devices can be programmed independently of the master as long as the clock divide
register numbers are not changed. The gain settings, for example, can be changed
independently.
2.
The method that is used to program a slave independently is to request a secondary
communication of the master and all slaves and ripple the delayed frame sync to the desired slave
device to be programmed.
3.
Secondary frame syncs must be requested for all devices in the system or none. This is required
so that the master generates secondary frames for the slaves and allows the slaves to know that
the second frame syncs they receive are secondary frame syncs. Each device in the system must
receive a secondary frame request in its corresponding primary frame sync period (11 in the last
2 LSBs).
4.
Calculation of the sampling frequency in terms of the master clock and the shift clock and the
respective register ratios is (see equations 4–6):
Sampling frequency
+ fs +
FCLK
B register value
+
f(MCLK)
2 (A register value)
(B register value)
(4)
Therefore,
f(MCLK)
fs
+ 2
(A register value)
(B register value)
(5)
and in terms of the shift clock frequency, since
(6)
f(SCLK)
fs
+
(A register value)
(B register value)
2
+
Number of SCLK periods
Sampling period
f(MCLK)
+ 4
f(SCLK)
then
5.
The minimum number of shift clocks between falling edges of any two frame syncs is 18 because
the frame sync delay register minimum number is 18.
When a secondary communication is requested by the host, the master secondary frame sync
begins at the middle of the sampling period (followed by the slave secondary frame syncs), so all
primary frame sync intervals (master and slave) must occur within one-half the sampling time.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC320AC02IFN | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| TLC320AC02CPMR | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| TLC320AC02IPM | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| TLC320AC02IFNR | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| TLC320AD55CDW | SPECIALTY ANALOG CIRCUIT, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC320AC01CFN | 制造商:Texas Instruments 功能描述:Special Function IC Package/Case:20-PLCC |
| TLC320AC01CFNR | 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AC01CPM | 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AC01CPMR | 功能描述:接口—CODEC Single Ch Codec-BW RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AC02 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single-Supply Analog Interface Circuit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。