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| 型號： | TLC2252MFK |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | Advanced LinCMOSE RAIL-TO-RAIL VERY LOW-POWER OPERATIONAL AMPLIFIERS |
| 中文描述： | 高級LinCMOSE軌至軌極低功耗運算放大器 |
| 文件頁數(shù)： | 47/57頁 |
| 文件大?。?/td> | 926K |
| 代理商： | TLC2252MFK |
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TLC225x, TLC225xA
Advanced LinCMOS
RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS176A – FEBRUARY 1997 – REVISED JULY 1999
47
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts
, the model generation software used
with Microsim PSpice
. The Boyle macromodel (see Note 5) and subcircuit in Figure 61 are generated using
the TLC225x typical electrical and operating characteristics at T
A
= 25
°
C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits,SC-9, 353 (1974).
OUT
+
–
+
–
53
+
–
+
–
+
–
+
–
+
–
+
–
+
–
.SUBCKT TLC225x 1 2 3 4 5
C1
C2
DC
DE
DLP
DLN
DP
EGND
FB
+ VLN 0 57.62E6 –60E6 60E6 60E6 –60E6
GA
6
GCM
0
ISS
3
HLIM
90
J1
11
J2
12
R2
6
11
6
5
54
90
92
4
99
7
12
7
53
5
91
90
3
0
99
6.369E–12
25.00E–12
DX
DX
DX
DX
DX
POLY (2) (3,0) (4,0) 0 .5 .5
POLY (5) VB VC VE VLP
0
6
10
0
2
1
9
11
10
DC 3.1E–6
VLIM 1K
10 JX
10 JX
100.0E3
12 26.86E–6
99 2.686E–9
RD1
RD2
R01
R02
RP
RSS
VAD
VB
VC
VE
VLIM
VLP
VLN
.MODEL DX D (IS=800.0E–18)
.MODEL JX PJF (IS=500.0E–15 BETA=139E–6
+ VTO=–.05)
.ENDS
60
60
8
7
3
10
60
9
3
54
7
91
0
11
12
5
99
4
99
4
0
53
4
8
0
92
37.23E3
37.23E3
84
84
71.43E3
64.52E6
–.5
DC 0
DC .605
DC .605
DC 0
DC –.235
DC 7.5
VCC+
RP
IN –
2
IN+
1
VCC–
VAD
RD1
11
J1
J2
10
RSS
ISS
3
12
RD2
60
VE
54
DE
DP
VC
DC
4
C1
R2
6
9
EGND
VB
FB
C2
GCM
GA
VLIM
8
5
RO1
RO2
HLIM
90
DLP
91
DLN
92
VLN
VLP
99
7
Figure 61. Boyle Macromodel and Subcircuit
PSpice and Partsare trademarks of MicroSim Corporation.
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