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參數(shù)資料
| 型號： | TLC1549MFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL |
| 中文描述： | 10位模擬數(shù)字轉(zhuǎn)換器與串行控制 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 238K |
| 代理商： | TLC1549MFK |
TLC1549C, TLC1549I, TLC1549M
10-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS059C – DECEMBER 1992 – REVISED MARCH 1995
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
simplified analog input analysis
Using the equivalent circuit in Figure 14, the time required to charge the analog input capacitance from 0 V to
V
S
within 1/2 LSB can be derived as follows:
The capacitance charging voltage is given by
(1)
where
R
t
= R
s
+ r
i
VC
VS1–e–tcRtCi
The final voltage to 1/2 LSB is given by
(2)
V
C
(1/2 LSB) = V
S
– (V
S
/2048)
Equating equation 1 to equation 2 and solving for time t
c
gives
(3)
and
t
c
(1/2 LSB) = R
t
×
C
i
×
ln(2048)
(4)
VS
VS2048
VS1–e–tcRtCi
Therefore, with the values given the time for the analog input signal to settle is
(5)
t
c
(1/2 LSB) = (R
s
+ 1 k
)
×
60 pF
×
ln(2048)
This time must be less than the converter sample time shown in the timing diagrams.
Rs
ri
VS
VC
50 pF MAX
1 k
MAX
Driving Source
TLC1549
Ci
VI
VI= Input Voltage at ANALOG IN
VS= External Driving Source Voltage
Rs= Source Resistance
ri = Input Resistance
Ci= Input Capacitance
Driving source requirements:
Noise and distortion for the source must be equivalent to the
resolution of the converter.
Rs must be real at the input frequency.
Figure 14. Equivalent Input Circuit Including the Driving Source
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