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參數(shù)資料
| 型號(hào)： | TL5632C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8-BIT 3-CHANNEL HIGH-SPEED DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 8位3通道高速數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 134K |
| 代理商： | TL5632C |
TL5632C
8-BIT 3-CHANNEL HIGH-SPEED DIGITAL-TO-ANALOG CONVERTER
SLAS091 – DECEMBER 1994
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
The following design procedures should be used for optimum operation.
External analog and digital circuitry should be physically separated and shielded as much as possible to
reduce system noise.
RF breadboarding or RF printed-circuit-board (PCB) techniques should be used throughout the evaluation
and production process.
Wide ground leads or a ground plane should be used on the PCB layouts to minimize parasitic inductance
and resistance. A ground plane is the better choice for noise reduction.
AV
CC
and DV
CC
are also separate internally, so they must be connected externally. These external PCB
leads should also be made as wide as possible. A ferrite bead or equivalent inductance should be placed
in series with AV
CC
and the decoupling capacitor before the AV
CC
and DV
CC
leads are connected together
on the board. It is critical that the supply voltage applied to AV
CC
be as noise free and ripple free as possible.
Ripple and noise rejection should be a minimum of 60 dB below the full-scale output range of 1 V
peak-to-peak.
AV
CC
to GND and DV
CC
to GND should be decoupled with 3.3-
μ
F and 0.1-
μ
F capacitors, respectively, as
close as possible to the appropriate device terminals. A ceramic chip capacitor is recommended for the
0.1-
μ
F capacitor.
The phase compensation capacitor should be connected between C
COMP
and GND with as short a lead-in
as possible.
The no-connection (NC) terminals on the small-outline package should be connected to GND.
AV
CC
, DV
CC
, and R
OUT
, G
OUT
, and B
OUT
should be shielded from the high-frequency terminals CLK
R
IN,
CLK
G
IN ,and CLK
B
IN and the input data terminals. GND traces should be placed on both sides of the R
OUT
,
G
OUT
, and B
OUT
traces on the PCB to the following signal processing stage. These output traces should
be as short as possible.
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