參數(shù)資料
型號: THS8134ACPHP
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48
封裝: PLASTIC, HTQFP-48
文件頁數(shù): 12/27頁
文件大?。?/td> 553K
代理商: THS8134ACPHP
THS8134, THS8134A, THS8134B
TRIPLE 8BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRILEVEL SYNC GENERATION
SLVS205D MAY 1999 REVISED MARCH 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
description (continued)
Finally the input format can be either 3
×8 bit 4:4:4, 2×8 bit 4:2:2, or 1×8 bit 4:2:2. This enables a direct interface
to a wide range of video DSP/ASICs including parts generating ITU-BT.656 formatted output data.
AVAILABLE OPTIONS
TA
PACKAGE
TA
TQFP-48 PowerPAD
THS8134CPHP
0
°C to 70°C
THS8134ACPHP
THS8134BCPHP
In the THS8134CPHP, the KIMBALmaximum specification is
assured over full temperature range and the KIMBAL(SYNC)
maximum specification is assured at 25
°C. The position of
the blanking level is as shown in Table 1.
In the THS8134ACPHP and the THS8134BCPHP, both the
KIMBALmaximum specification and the KIMBAL(SYNC)
maximum specification are assured over the full temperature
range. The position of the blanking level is as shown in
Table 1.
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
PIN
I/O
DESCRIPTION
ABPb
45
O
Analog red, green and blue respectively Pr, Y and Pb current outputs, capable of directly driving a doubly
terminated 75-
coaxial cable.
AGY
41
O
Analog red, green and blue respectively Pr, Y and Pb current outputs, capable of directly driving a doubly
terminated 75-
coaxial cable.
ARPr
43
O
AVDD
40,44
I
Analog power supply (5 V
±10%). All AVDD terminals must be connected.
AVSS
42,46
I
Analog ground
BLANK
23
I
Blanking control input, active low. A rising edge on CLK latches BLANK. When asserted, the ARPr, AGY and
ABPb outputs are driven to the blanking level, irrespective of the value on the data inputs. SYNC takes
precedence over BLANK, so asserting SYNC (low) while BLANK is active (low) will result in sync generation.
BPb0BPb7
81
I
Blue or Pb pixel data input bus. Index 0 denotes the least significant bit. Refer to functional description for
different operating modes.
CLK
26
I
Clock input. A rising edge on CLK latches RPr0-7, GY0-7, BPb0-7, BLANK, SYNC, and SYNC_T. The M2 input is
latched by a rising edge on CLK also, but only when additional conditions are satisfied, as explained in its
terminal description.
COMP
39
O
Compensation terminal. A 0.1
F capacitor must be connected between COMP and AVDD.
DVDD
12
I
Digital power supply (3-V to 5-V range)
DVSS
11
I
Digital ground
FSADJ
38
I
Full-scale adjust control. The full-scale current drive on each of the output channels is determined by the value of
a resistor RFS connected between this terminal and AVSS. The nominal value of RFS is 430 , corresponding to
26.67 mA full-scale current. The relationship between RFS and the full-scale current level for each operation
mode is explained in the functional description.
GY0GY7
3427
I
Green or Y pixel data input bus. Index 0 denotes the least significant bit. Refer to functional description for
different operating modes.
M1
47
I
Operation mode control 1. M1 is directly interpreted by the device (it is not latched by CLK). M1 configures device
according to Table 1.
相關(guān)PDF資料
PDF描述
THS8135-240IPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135-80CPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135-80IPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135-240CPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135PHP PARALLEL, WORD INPUT LOADING, 0.015 us SETTLING TIME, 10-BIT DAC, PQFP48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
THS8134ATQFP 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION
THS8134B 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION
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