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參數(shù)資料
| 型號(hào)： | THS8133ACPHP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| 封裝： | PLASTIC, HTQFP-48 |
| 文件頁數(shù)： | 8/25頁 |
| 文件大?。?/td> | 549K |
| 代理商： | THS8133ACPHP |
THS8133, THS8133A, THS8133B
TRIPLE 10BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRILEVEL SYNC GENERATION
SLVS204C APRIL 1999 REVISED SEPTEMBER 2000
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
APPLICATION INFORMATION
SMPTE 253M (continued)
BLANK can be tied high in this mode if the data input is kept to 000h during the blanking time, since black and
blanking level are at identical levels. Furthermore the SYNC_T terminal remains low, since only a bi-level sync
is generated.
SMPTE 274M
This standard defines a raster scanning format of 1920
×1080 pixels inside a total raster of 1125 lines and an
aspect ratio of 16:9, GBR and YPbPr color encoding formats and both analog and digital interfaces for GBR
and YPbPr formats.
With respect to the analog interface, SMPTE 274M defines the position of the start of each line at the positive
zero-crossing of a tri-level sync pulse. The sync pulse has a negative-going transition on a fixed number of clock
cycles preceding this instant and another negative transition on a fixed number of clock cycles following this
instant, as shown in Figure 13. The positive peak of sync is 300 mV; the negative peak of sync –300 mV.
The interface can carry both GBR or YPbPr signals. The tri-level horizontal sync is inserted on all analog outputs
and has identical absolute amplitude levels in all cases. For Y, black corresponds to a level of 0 V and peak white
is 700 mV. Pb and Pr on the other hand have amplitudes between –350 mV and 350 mV.
The relative amplitudes of the current sources are identical to the case of SMPTE 253M. However, in this case
a tri-level sync needs to be generated instead of a bi-level negative sync, and it needs to be present on all three
component outputs. THS8133 supports the tri-level sync via an additional internal current source, activated by
asserting SYNC_T. The sync insertion on all outputs is under the control of the INS3_INT pin. When asserted
(high), the sync is inserted on all three output channels.
0H
Analog
Waveform
(Y’R’G’B’)
Duration in
Reference
Clock Period
44T
1920T
Figure 13. SMPTE 274M Line Waveform
This figure is for illustration purposes only. Consult the latest SMPTE 274M standard when designing a compliant system.
Figure 14 shows the relative amplitudes of video and horizontal/vertical sync. The level of vertical sync (broad
pulse) is identical to the negative excursion of horizontal sync and therefore can be generated by the same
current source on THS8133 by appropriately asserting the sync control inputs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS8133ATQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
| THS8133B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
| THS8133BCPGP | 制造商:Texas Instruments 功能描述: |
| THS8133BCPHP | 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 10B 80 MSPS Triple Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray |
| THS8133BCPHPG4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
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