SLOS674 – JUNE 2010
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APPLICATION INFORMATION
All
outputs
can
drive
two
video
lines
with
The THS7360 is targeted for six-channel video output
dc-coupling or traditional ac-coupling
applications that require three standard-definition
Flow-through configuration using a TSSOP-20
(SD) video output buffers and three selectable filter
package that complies with the latest lead-free
(SF) output buffers. Although it can be used for
(RoHS-compatible)
and
green
manufacturing
numerous
other
applications,
the
needs
and
requirements
requirements of the video signal are the most
important design parameters of the THS7360. Built
OPERATING VOLTAGE
on
the
revolutionary,
complementary
Silicon
Germanium (SiGe) BiCom3X process, the THS7360
The THS7360 is designed to operate from 2.7 V to
incorporates many features not typically found in
5 V over the –40°C to +85°C temperature range. The
integrated video parts while consuming very low
impact on performance over the entire temperature
power. The THS7360 includes the following features:
range is negligible as a result of the implementation
Single-supply 2.7-V to 5-V operation with low total
of thin film resistors and high-quality, low-temperature
quiescent current of 24.5 mA at 3.3 V and
coefficient capacitors. The design of the THS7360
25.5 mA at 5 V
allows
operation
down
to
2.6
V,
but
it
is
recommended to use at least a 3-V supply to ensure
Disable mode allows for shutting down individual
that no issues arise with headroom or clipping with
SD/SF blocks of amplifiers to save system power
100% color-saturated CVBS signals. If only 75% color
in power-sensitive applications
saturated CVBS is supported, then the output voltage
Input configuration accepts dc + level shift, ac
requirements are reduced to 2 VPP on the output,
sync-tip clamp, or ac-bias
allowing a 2.7-V supply to be utilized without issues.
–
AC-biasing is allowed with the use of external
A 0.1-mF to 0.01-mF capacitor should be placed as
pull-up resistors to the positive power supply
close as possible to the power-supply pins. Failure to
Sixth-order, low-pass filter for DAC reconstruction
do so may result in the THS7360 outputs ringing or
or ADC image rejection:
oscillating. Additionally, a large capacitor (such as
–
9.5 MHz for NTSC, PAL, SECAM, composite
22 mF to 100 mF) should be placed on the
video
(CVBS),
S-Video
Y’/C’,
480i/576i,
power-supply
line
to
minimize
interference
with
Y’/P’B/P’R, and G’B’R’ (R’G’B’) signals
50-/60-Hz line frequencies.
–
Selectable
9.2-MHz/17-MHz/35-MHz/70-MHz
for
480i/576i,
480p/576p,
INPUT VOLTAGE
720p/1080i/1080p24/1080p30,
or
1080p60
The THS7360 input range allows for an input signal
Y’/P’ B/P’R or G’B’R’ signals; also allows up to
range from –0.2 V to approximately (VS+ – 1.5 V).
QXGA (1600 × 1200 at 60 Hz) R'G'B' video
However, because of the internal fixed gain of
Individually-controlled Bypass mode bypasses the
5.6 V/V (+15 dB) on the SD channels or 4.5 V/V
low-pass filters for each SD/SF block of amplifiers
(+13.1dB) and the internal input level shift of 120 mV
–
SD
bypass
mode
features
60-MHz
and
(typical), the output is generally the limiting factor for
150-V/ms performance
the allowable linear input range. For example, with a
–
SF
bypass
mode
features
280-MHz
and
5-V supply, the linear input range is from –0.2 V to
800-V/ms performance
3.5 V. However, because of the gain and level shift,
Individually-controlled Disable mode shuts down
the linear output range limits the allowable linear
all amplifiers in each SD/SF block to reduce
input range to approximately –0.08 V to 0.8 V.
quiescent current to 0.1 mA
Internally-fixed gain of 5.6-V/V (+15-dB) for SD
channels or 4.5-V/V (+13.1-dB) for SF channels
22
Copyright 2010, Texas Instruments Incorporated