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| 型號： | THS7303PW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO AMPLIFIER, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 37/60頁 |
| 文件大?。?/td> | 1980K |
| 代理商： | THS7303PW |
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SLOS479B
– OCTOBER 2005 – REVISED MARCH 2011
SLAVE ADDRESS
The slave address byte is the first byte received following the start condition from the master device. The first five
bits (MSBs) of the address are factory preset to '01011'. The next two bits of the THS7303 address are controlled
by the logic levels appearing on the I2C A1 and I2C A0 pins. The I2C A1 and I2C A0 address inputs can be
connected to VS+ for logic 1, GND for logic 0, or can be actively driven by TTL/CMOS logic levels. The device
address is set by the state of these pins and is not latched. Thus, a dynamic address control system can be used
to incorporate several devices on the same system. Up to four THS7303 devices can be connected to the same
I2C bus without requiring additional glue logic. Table 1 lists the possible addresses for the THS7303
Table 1. THS7303 Slave Addresses
SELECTABLE WITH
READ/WRITE
FIXED ADDRESS
ADDRESS PINS
BIT
BIt 7 (MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2 (A1)
BIT 1 (A0)
BIT 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CHANNEL SELECTION REGISTER DESCRIPTION (SUB-ADDRESS)
The THS7303 operates using only a single-byte transfer protocol similar to Figure 75 and Figure 77. The internal
sub-address registers, and the functionality of each, are found in Table 2. When writing to the device, it is
required to send one byte of data to the corresponding internal sub-address. If control of all three channels is
desired, then the master must cycle through all the sub-addresses (channels) one at a time; see the Example:
Writing to the THS7303 section for the proper procedure of writing to the THS7303.
During a read cycle, the THS7303 sends the data in its selected sub-address (or channel) in a single transfer to
the master device requesting the information. See the Example: Reading from the THS7303 section for the
proper procedure on reading from the THS7303.
Table 2. THS7303 Channel Selection Register Bit Assignments
BIT ADDRESS
REGISTER NAME
(b7b6b5....b0)
Channel 1
0000 0001
Channel 2
0000 0010
Channel 3
0000 0011
42
Copyright
2005–2011, Texas Instruments Incorporated
Product Folder Link(s): THS7303
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| THS7303PWG4 | 功能描述:視頻放大器 3-Ch Low Power Video RoHS:否 制造商:ON Semiconductor 通道數(shù)量:4 電源類型: 工作電源電壓:3.3 V, 5 V 電源電流: 最小工作溫度: 最大工作溫度: 封裝 / 箱體:TSSOP-14 封裝:Reel |
| THS7303PWR | 功能描述:視頻放大器 3-Ch Low Power Video RoHS:否 制造商:ON Semiconductor 通道數(shù)量:4 電源類型: 工作電源電壓:3.3 V, 5 V 電源電流: 最小工作溫度: 最大工作溫度: 封裝 / 箱體:TSSOP-14 封裝:Reel |
| THS7303PWRG4 | 功能描述:視頻放大器 3-Ch Low Power Video RoHS:否 制造商:ON Semiconductor 通道數(shù)量:4 電源類型: 工作電源電壓:3.3 V, 5 V 電源電流: 最小工作溫度: 最大工作溫度: 封裝 / 箱體:TSSOP-14 封裝:Reel |
| THS730A A2 | 制造商:Tektronix Inc 功能描述:OSCILLOSCOPE DSO/DMM 200MHZ |
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