參數(shù)資料
型號： THS6182DWRG4
廠商： Texas Instruments, Inc.
英文描述： LOW-POWER DISSIPATION ADSL LINE DRIVER
中文描述： 低功耗ADSL線路驅(qū)動器
文件頁數(shù)： 4/35頁
文件大小： 1242K
代理商： THS6182DWRG4
www.ti.com
THS6182
SLLS544G–SEPTEMBER 2002–REVISED NOVEMBER 2004
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, T
A
= 25°C, V
CC
= ±12 V, R
F
= 2 k
,
Gain = +5, I
ADJ
= Bias1 = Bias2 = 0 V, R
L
= 50
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT CHARACTERISTICS
R
L
= 100
R
L
= 25
R
L
= 100
R
L
= 25
R
L
= 100
R
L
= 25
V
CC
= ±5 V
V
CC
= ±12 V
V
CC
= ±15 V
V
CC
= ±12 V
±3.9
±4.1
V
CC
= ±5 V
V
±3.7
±3.9
±10.7
±11.0
V
O
Single-ended output voltage swing
V
CC
= ±12 V
V
±10
±10.6
±13.5
±13.9
V
CC
= ±15 V
V
±12.7
±13.4
R
L
= 5
±350
±400
I
O
Output current
(1)
±450
±600
mA
R
L
= 10
±450
±600
I
(SC)
Short-circuit current
(1)
R
L
= 1
Open-loop
1000
mA
Output resistance
6
k
Output resistance—terminate mode
f = 1 MHz,
Gain = +10
0.05
Output resistance—shutdown mode
f = 1 MHz,
Open-loop
8.5
POWER SUPPLY
Dual supply
±4
±12
±16.5
V
CC
Operating range
V
Single supply
8
24
33
T
A
= 25°C
T
A
= full range
T
A
= 25°C
T
A
= full range
T
A
= 25°C
T
A
= full range
9.7
10.7
V
CC
= ± 5 V
mA
11.7
Quiescent current (each driver)
(2)
Full-bias mode (Bias-1 = 0,
Bias-2 = 0)
(Trimmed with V
CC
= ±12 V at 25°C)
11
12
V
CC
= ± 12 V
mA
12.5
I
CC
11.5
12.5
V
CC
= ±15 V
mA
13
Mid; Bias-1 - 1, Bias-2 = 0
7.5
8.5
Quiescent current (each driver)
Variable bias modes, V
CC
= ±12 V
Low; Bias-1 = 0, Bias-2 = 1
4
5
mA
Shutdown; Bias-1 = 1, Bias-2 = 1
0.25
0.9
T
A
= 25°C
T
A
= full range
T
A
= 25°C
T
A
= full range
-50
-56
V
CC
= ±5 V,
V
CC
= ±0.5 V
-47
PSRR
Power supply rejection ratio
dB
-56
-60
V
CC
= ±12 V, ±15 V,
V
CC
= ±1 V
-53
DYNAMIC PERFORMANCE
Gain = +1, RF = 1.2 k
Gain = +2, RF = 1 k
Gain = +5, RF = 1 k
Gain = +10, RF = 1 k
Gain = +1, RF = 1.5 k
Gain = +2, RF = 1 k
Gain = +5, RF = 1 k
Gain = +10, RF = 1 k
Gain = +5
100
80
R
L
= 100
MHz
35
20
Single-ended small-signal bandwidth
(-3 dB), V
O
= 0.1 Vrms
BW
65
60
R
L
= 25
MHz
40
22
SR
Single-ended slew rate
(3)
V
O
= 10 Vpp,
450
V/μs
(1)
A heatsink is required to keep the junction temperature below absolute maximum rating when an output is heavily loaded or shorted.
See Absolute Maximum Ratings section for more information.
Approximately 0.5 mA (total) flows from V
to GND for internal logic control bias.
Slew rate is defined from the 25% to the 75% output levels.
(2)
(3)
4
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