參數(shù)資料
型號: THS5641PW
廠商: Texas Instruments, Inc.
英文描述: 8-BIT, 100 MSPS, CommsDACE DIGITAL-TO-ANALOG CONVERTER
中文描述: 8位,100 MSPS的,CommsDACE數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 15/28頁
文件大?。?/td> 702K
代理商: THS5641PW
THS5641
8-BIT, 100 MSPS, CommsDAC
DIGITAL-TO-ANALOG CONVERTER
SLAS199A – MAY 1999 REVISED JUNE 1999
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
DAC transfer function
The THS5641 delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the
approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the
binary input word has the decimal representation 255. For mode 1, the MSB is inverted (twos complement input
format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,
straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:
IOUT1
IOUT
FS
IOUT2
where IOUT
FS
is the full-scale output current. The output currents can be expressed as:
CODE
256
IOUT1
IOUT
FS
IOUT2
IOUT
FS
(255
CODE)
256
where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive
resistor loads R
LOAD
or a transformer with equivalent input load resistance R
LOAD
. This would translate into
single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:
VOUT1
IOUT1
R
LOAD
CODE
256
IOUT
FS
R
LOAD
VOUT2
IOUT2
R
LOAD
(255–CODE)
256
IOUT
FS
R
LOAD
The differential output voltage VOUT
DIFF
can thus be expressed as:
VOUT
DIFF
VOUT1–VOUT2
(2CODE–255)
256
IOUT
FS
R
LOAD
The latter equation shows that applying the differential output will result in doubling of the signal power delivered
to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and
IOUT2, which would lead to increased signal distortion.
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