
THS4021, THS4022
350-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS265B – SEPTEMBER 1999 – REVISED FEBRUARY 2000
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
general PowerPAD design considerations (continued)
Figure 42
Package With
θ
JA
≤
60
°
C/W
SO-8 Package
θ
JA = 98
°
C/W
High-K Test PCB
VCC =
±
5 V
TJ = 150
°
C
TA = 50
°
C
Both Channels
100
80
40
0
0
1
| VO | – RMS Output Voltage – V
2
3
–
IO
|
140
180
200
4
5
160
120
60
20
|
Maximum Output
Current Limit Line
THS4022
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
SO-8 Package
θ
JA = 167
°
C/W
Low-K Test PCB
Safe Operating Area
Figure 43
100
10
0
3
| VO | – RMS Output Voltage – V
6
9
1000
12
15
Maximum Output
Current Limit Line
–
IO
|
|
VCC =
±
15 V
TJ = 150
°
C
TA = 50
°
C
Both Channels
THS4022
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
1
SO-8 Package
θ
JA = 167
°
C/W
Low-K Test PCB
DGN Package
θ
JA = 58.4
°
C/W
Safe Operating Area
SO-8 Package
θ
JA = 98
°
C/W
High-K Test PCB